Faculty Publications
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Item This paper presents a design & implementation methodology for FPGA based MIL-STD-1553 Remote Terminal Sub-System using DDC's BU-61580 device. The interesting part of this paper is that it presents a design of non-processor remote terminal sub-system. The glue logic is put on one FPGA of 176 pins which initializes the BU-61580 in RT mode at power-on. The FPGA design was done using Viewlogic & Actel packages. The simulation has shown the correct results which was then followed by the implementation. In this paper, the design is presented for 9 sensors among which 5 are analog and 4 are digital. For the purpose of testing the circuit, the analog & digital sensors are simulated through the computer.(ISRO Satellite Centre, Design and implementation of FPGA based non-processor MIL-STD-1553 remote terminal sub-system using DDC's BU-61580) Bhagyalakshmi, K.; Ramachandra, G.; Agrawal, V.K.; Subbanna Bhat, P.; Philar, S.R.1999Item Face Recognition (FR) systems are increasingly gaining more importance. Face detection and tracking in a complex scene forms the first step in building a practical FR system. In this paper, a method to detect and track human faces in color image sequences is described. Skin color classification and morphological segmentation is used to detect face(s) in the first frame. These detected faces are tracked over subsequent frames by using the position of the faces in the first frame as the marker and detecting for skin in the localized region. Specific advantages of this approach are that skin color analysis method is simple and powerful, and the system can be used to detect/track multiple faces. © 2002 Taylor & Francis Group, LLC.(Human face detection and tracking using skin color modeling and connected component operators) Kuchi, P.; Gabbur, P.; Subbanna Bhat, P.; Sumam David, S.2002