Faculty Publications

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    Theoretical Analysis of On-Chip Vertical Hybrid Plasmonic Nanograting
    (Springer, 2022) Reddy, S.K.; Sahu, S.K.; Khoja, R.; Kanu, S.; Singh, M.
    A complementary metal oxide semiconductor (CMOS) compatible photonic-plasmonic waveguide with nanoscale dimensions and better optical confinement has been proposed for the infrared (IR)–band applications. The design is based on the multi-layer hybrid plasmonic waveguide (Si–SiO2–Au) structure. The 3D-finite element method (FEM)–based numerical simulations of single slot hybrid plasmonic waveguide (HPWG) confirms 2.5 dB/cm propagation loss and 15 μm−2 confined intensity. Moreover, its application as dual-slot nanograting is studied with higher propagation length and ultra–low–dispersion near the 1550–nm wavelength. The proposed low-dispersion nanoscale grating design is suitable for future lab–on–chip nanophotonic integrated circuits. © 2021, The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature.
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    High-Performance All-Optical Hybrid Plasmonic Switch Using Zn-Doped Cadmium Oxide
    (Institute of Electrical and Electronics Engineers Inc., 2023) Sahu, S.K.; Singh, M.
    In this article, a novel hybrid plasmonic waveguide (HPWG)-based all-optical switch (AOS) using zinc-doped cadmium oxide (ZnCdO) is reported and numerically investigated with the finite-element method. This oxide layer, which is a well-known transparent conductive oxide (TCO), can be switched from a dielectric to a metallic phase by electrical tuning the refractive index. The mobility of free-carrier concentration is highly magnified with a nonlinear optical effect induced by the epsilon-near-zero material near the telecommunication wavelength. We have simulated the plasmonic switch using the COMSOL Multiphysics simulator, predicting 13.75 dB extinction ratio (ER), 0.5 dB insertion loss (IL), and 27.5 figure-of-merit (FoM) at 1.55 \mu \text{m} wavelength. We also performed the reliability study by varying parameters, such as the width and height of the waveguide, which affect the performance of the on-chip switch design. In addition, the proposed AOS can be easily integrated with future silicon photonic circuits for ultrafast switching applications. © 1973-2012 IEEE.