Faculty Publications
Permanent URI for this communityhttps://idr.nitk.ac.in/handle/123456789/18736
Publications by NITK Faculty
Browse
2 results
Search Results
Item A Novel Seven level inverter with Common-Leg Configuration by Employing Transformers(Institute of Electrical and Electronics Engineers Inc., 2022) Nageswar Rao, B.; Yellasiri, Y.; Shiva Naik, B.S.; Aditya, K.This paper proposes a new multilevel inverter with a common leg structure using three transformers and eight power semiconductor devices. The intended configuration contains of one traditional H-bridge and two half bridges supplied from a single dc source. The switching power circuit powered three transformers with series connections, which produced seven levels (3VDC, 2VDC, VDC, 0, -VDC, -2VDC, -3VDC) at the inverter output from the source VDC. Further, this circuit demonstrates the benefit of fewer switches and drivers in comparison to the traditional circuits for the production of the same load voltage levels. Thus, the suggested topology complexity, volume, and cost are reduced. Finally, the effectiveness of the suggested inverter is performed using MATLAB, and the simulation studies are incorporated. © 2022 IEEE.Item Novel Nine-level Inverter Topology with Boosting Ability for Electric Vehicle Application(Institute of Electrical and Electronics Engineers Inc., 2023) Aditya, K.; Yellasiri, Y.; Shiva Naik, B.S.; Nageswar Rao, B.N.; Karunakaran, E.; Reddy, R.D.This paper proposes a new switched-capacitor (SC) based multilevel inverter (MLI) with a boosting gain of four for electric vehicle (EV) applications. The proposed SC-based ninelevel quadruple boost inverter (SC-NLQBI) topology consists of 13 semiconductor switches, three capacitors, and a single input DC supply. It generates nine level voltage waveform, which lessens the requirement for extra filters. Compared to the current nine-level inverter, the new SC-NLQBI topology is simple, compact, and requires fewer parts. Here, a simple triangular carrier signal-based sinusoidal pulse width modulation (SPWM) method is used to generate the required gating pulses. While the proposed topology is being modeled in a MATLAB/Simulation platform using both normal and problematic conditions, the results are analyzed. © 2023 IEEE.
