Faculty Publications
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Item A Hybrid Nine-Level Inverter Topology with Boosting Capability and Reduced Component Count(Institute of Electrical and Electronics Engineers Inc., 2021) Shiva Naik, B.S.; Yellasiri, Y.; Venkataramanaiah, J.; Panda, A.K.Nowadays, output voltage boosting gain property along with curtailment in the circuit voltage stress, and component count are considered as the essential topological features for the new multilevel inverter (MLI) circuits. Recognizing the above, a hybrid nine-level inverter topology (HNIT) for DC-AC conversion is proposed in this brief. Each phase of the HNIT is designed with only eight semiconductor switches, one diode, and two electrolytic capacitors. Herein, series-parallel and conventional-series techniques are utilized effectively to balance the capacitor voltages. Further, cost and quantitative comparisons are carried among the state-of-art circuits to highlight the supremacy of proposed circuit. Subsequently, the performance of HNIT is verified experimentally with the fundamental switching PWM technique at different load conditions. © 2004-2012 IEEE.Item A novel nine-level boost inverter with a low component count for electric vehicle applications(John Wiley and Sons Ltd, 2021) Shiva Naik, B.S.; Yellasiri, Y.; Aditya, K.; Nageswar Rao, B.N.In electric vehicles (EVs), considerable battery cells are cascaded in series for motor driving to improve the output voltage. The series combination of battery cells causes challenges like isolation of faulty cells, voltage unbalance, and slow charge equalization. Therefore, state-of-charge (SOC) and voltage equalization circuits are often used in industries to protect the battery cells. A nine-level inverter circuit with a double voltage boost is proposed to reduce the above issues based on the switch-capacitor (SC) principle. Unique features like self-balancing, voltage boosting are attained, which cannot be achieved through traditional inverters. The proposed topology can operate at a wide range of modulation indices ((Formula presented.)) to produce different voltage levels. The absence of a back-end H-bridge in the proposed circuit offers low voltage stress across the semiconductors. The operating principle, capacitor sizing, and modulation approach are presented. Further, experimental tests are conducted at different loading conditions to verify the performance of the proposed circuit. © 2021 John Wiley & Sons Ltd.Item A Novel Quadruple Boost Inverter With New Optimized Fuzzy-Based Switching Scheme(Institute of Electrical and Electronics Engineers Inc., 2024) Aditya, K.; Yellasiri, Y.; Shiva Naik, B.S.; Nageswar Rao, B.N.; Panda, A.K.This brief proposes a novel quadruple boost nine-level inverter (QB-NLI) and an optimized switching pattern using fuzzy logic controller. The suggested method simplifies the traditional approach by removing the conventional logic gate circuit design. The pulse signal generator and lookup table are both derived using a fuzzy logic pulse generator. Fuzzy logic controller (FLC) and Controlled membership functions (MFs) rules open numerous prospects for generating pulses based on the input as modulation index. The suggested technique is examined on the proposed QB-NLI topology using the selective harmonic elimination PWM method. MFs are created based on averaging Newton Rapson and quantizer firing angles for diverse modulation index (mi) values. The proposed QB-NLI structure comprises ten switches with one dc-voltage source and two capacitors. The proposed structure's circuit description, modes of operation, proper component selection, and a new fuzzy-based switching scheme are presented. Further, a discussion about the comparative analysis of the proposed switching technique with other switching techniques concerning THD and RMS voltages is presented. In addition to the simulation results, experimental tests are conducted under various load conditions on the built-in hardware prototype to evaluate the proposed QB-NLI structure and switching technique. © 2023 IEEE.Item A modified T-type multilevel inverter for renewable energy applications(Elsevier Ltd, 2024) Nageswar Rao, B.; Yellasiri, Y.; Shiva Naik, B.S.; Aditya, K.; Panda, A.K.The primary challenge in integrating renewable resources into grids using multilevel inverters (MLI) is the need for many separate DC sources and switching device counts. Transformer-based multilevel inverters (TMIs) have emerged to address this issue, aiming to minimize system components and boost source voltage with a single DC source. This research article introduces a novel TMI topology that utilizes only a single DC source and incorporates ten switches to produce good-quality load voltage with high magnitude. The proposed TMI offers several structural advantages, including self-galvanic isolation, reduced switching devices and uniform voltage levels across all turn ratios. Additionally, the TMI operates a switching method called pulse width modulation, which provides the gating pulses to all the power semiconductor devices in the proposed TMI. An experimental model has been created in a laboratory environment, and simulations are performed using the MATLAB/Simulink platform to assess the effectiveness of the suggested TMI. Furthermore, a comparison between the suggested TMI circuit and other recent TMI designs with similar characteristics is performed. This comparison is carried out to assess and validate the superior features of the proposed TMI over the alternative designs. © 2024 Elsevier B.V.Item Design and implementation of novel multilevel inverter with full DC-utilization(Taylor and Francis Ltd., 2025) Nageswar Rao, B.; Yellasiri, Y.; Aditya, K.; Shiva Naik, B.S.; Karunakaran, E.This paper presents a novel single-source transformer-based nine-level (9 L) inverter configuration. The design incorporates a three-level neutral-point-clamped (3 L NPC) inverter, a 3-L full bridge, and a transformer to produce 9 L output voltage levels. In particular, one of the 2 L legs in the full bridge is common among the transformer and the load. The proposed structure minimises the components compared to existing transformer-based nine-level inverters. Thus, the suggested inverter volume, cost, and complexity are minimised. Furthermore, a pulse width modulation method has been developed to generate the necessary gating pulses for the proposed inverter. Additionally, a complete comparison study illustrates the enhanced performance of the suggested architecture. The validity of the suggested 9 L inverter is assessed by performing MATLAB simulations and using a scaled prototype. The results obtained from the simulations and experimental tests are then presented and analysed. A clear correlation was observed between the simulation and the hardware results. © 2024 Informa UK Limited, trading as Taylor & Francis Group.