Faculty Publications
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Item A new nine-level single-DC source-based inverter topology for distributed generation(Institute of Electrical and Electronics Engineers Inc., 2017) Sandeep, N.; Yaragatti, U.R.Multilevel inverter enables to completely remove the passive filtering requirement at the grid interfacing end, resulting in improved efficiency and reduced cost. These features have led to increasing attention towards their application to medium and high-power arena. In this paper, investigation of a hybrid 9-level inverter topology for grid integration of renewable energy sources is presented. The structural details, operating principle, capacitor voltage balancing control and the main features of the proposed inverter are presented. The proposed topology is compared with other similar 9-level converters to emphasize its superior characteristics and performance. Simulation results demonstrating the grid connected operation of the converter for two test cases are presented. The results affirm the effectiveness of the capacitor voltage balancing control in maintaining capacitor voltages at set values, under steady state and transient operation of the converter. © 2016 IEEE.Item Design and Implementation of a Sensorless Multilevel Inverter with Reduced Part Count(Institute of Electrical and Electronics Engineers Inc., 2017) Sandeep, N.; Yaragatti, R.Y.This letter proposes a single-phase nine-level (9L) inverter topology suitable for grid-connected renewable energy systems. The proposed inverter is realized using a T-Type neutral-point-clamped inverter connected in cascade to a floating capacitor (FC) H-bridge. Additionally, two low-frequency switches are added across the dc-link enabling the inverter to generate a 9L waveform. A sensorless voltage control based on redundant switching state is developed and embedded with PWM controller, which is responsible for regulating the FC voltage at one-quarter of the dc source voltage. The proposed PWM technique employs the generation of 9L waveform without using any voltage sensor, thereby reducing the complexity of the overall control scheme. This, in turn, will make the overall system appealing for various industrial applications. In comparison to conventional and recent topologies, generation of the 9L waveform using a lower number of components is the notable contribution. Another important feature of the proposed inverter is that if FC H-bridge fails, it can be bypassed, and the inverter can still operate as a 5L inverter at its nominal power rating. Furthermore, a comprehensive comparison study is included which confirms the merits of the proposed inverter against those of other state-of-The-Art topologies. Finally, simulation and experimental results are included for validating the feasibility of the proposed system. © 1986-2012 IEEE.Item Operation and Control of an Improved Hybrid Nine-Level Inverter(Institute of Electrical and Electronics Engineers Inc., 2017) Sandeep, N.; Yaragatti, R.Y.This paper proposes a new nine-level inverter for medium- and high-power applications. The proposed topology comprises of a three-level (3L) active neutral-point-clamped (ANPC) inverter connected in series with a floating capacitor (FC) fed H-bridge. Besides, two additional switches operating at line frequency are appended across the dc link of the 3L ANPC structure. Compared with conventional hybrid cascaded inverters, the primary advantage of this addition is doubling of the resulting root mean square output voltage. This amelioration is achieved while preserving the standard 3L ANPC and H-bridge structures with minimum topological modification. A simple logic-gate-based voltage balancing scheme is developed to regulate the FC voltage. The proposed voltage balancing method is independent of load power factor, inverter modulation index, and can balance the voltage across FC instantaneously. The step-by-step formulation of logical expressions for the generation of gating pulses is deliberated in detail and can be generalized for any n-level inverter. Further, simulation results as well as the experimental measurements obtained from the laboratory prototype are presented to validate the effectiveness and practicability of the proposed configuration. Finally, the notable merits of the proposed inverter over the prior art topologies is established through a comprehensive comparative study. © 1972-2012 IEEE.Item Design and implementation of active neutralpoint-clamped nine-level reduced device count inverter: An application to grid integrated renewable energy sources(Institution of Engineering and Technology journals@theiet.org, 2018) Sandeep, N.; Yaragatti, U.R.Multilevel inverters are one of the preferred choices in medium-voltage and high-power applications in the recent past. Active neutral-point-clamped (ANPC) inverter is the most popular topology, especially in the class of five-level (5L) inverters. In this study, a nine-level topology with improved output waveform quality is proposed based on ameliorating the 5L ANPC inverter with least modifications. The addition of only two switches operating at line frequency to the conventional 5L ANPC inverter while maintaining an identical precursor part count is the proposed modification. A logic form equation-based active voltage balancing scheme that is independent of load current and power factor is developed to regulate the flying capacitor voltage at the reference value. The operating principle, salient features, and the developed control scheme are comprehensively detailed. The operation of the proposed inverter considering a grid integrated case is simulated in MATLAB/ Simulink, and the results corresponding to steady-state and dynamic conditions are presented. The benefits of the proposed topology are elucidated by comparing it with other classic topologies considering various prominent viewpoints. This comparison has illustrated the proposed topology's distinctive characteristics and profound advantages. The performance validation, feasibility, and practicability of the proposed inverter are established through the experimental results obtained from a laboratory-scale prototype. © The Institution of Engineering and Technology 2017.Item Simplified transformer-based multilevel inverter topology and generalisations for renewable energy applications(Institution of Engineering and Technology journals@theiet.org, 2018) Behara, S.; Sandeep, N.; Yaragatti, U.R.Multilevel inverters (MLIs) generating high-quality voltage waveforms are playing a significant role in renewable energy applications. However, the requirement of higher number of power devices, complex pulse-width-modulation (PWM) and voltage unbalancing issues are the impediments associated with their direct usage. Consequently, several attempts to devise MLIs with lesser number of overall components are witnessed. This study focuses on developing a nine-level inverter comprising of a single transformer and reduced component count. An optimisation of the number of transformers and their turn's ratio for a given number of voltage levels resulting in the least number of switches is investigated and deliberated in detail. Besides, an uncomplicated logic gate-based PWM strategy is developed for generating the gating signals of switches using simple Boolean logic relations. A detailed comparison with other recommended MLI topologies is presented to highlight the notable features of the proposed topology. Simulation results obtained using the model developed in MATLAB/Simulink along with the experimental measurements obtained from a downscale prototype is presented to validate the practicability, effectiveness, and viability of the proposed topology. An explicit agreement among the simulation and experimental results is observed. © The Institution of Engineering and Technology 2017.Item Operation and Control of a Nine-Level Modified ANPC Inverter Topology with Reduced Part Count for Grid-Connected Applications(Institute of Electrical and Electronics Engineers Inc., 2018) Sandeep, N.; Yaragatti, U.R.This paper presents a nine-level active-neutral-point-clamped (ANPC) based multilevel inverter (MLI) topology for grid-connected applications requiring only ten switches. The envisaged structure comprises two parts, namely five-level ANPC unit, and a two-level converter leg whose midpoint is used as another ac terminal. An ad hoc switching state redundancy based modulation strategy is used to ensure that the voltage across the flying capacitor is tightly balanced and is implemented using a look-up table further simplifies the control complexity. The performance and effectiveness of the proposed topology with its control scheme are validated through simulations and experimental tests. Comparison with other MLIs is included to highlight the merits of the proposed topology. From the results, it will be shown that the proposed inverter requires the least part count as compared to other topologies with the same performance and output quality. © 1982-2012 IEEE.Item A Switched-Capacitor-Based Multilevel Inverter Topology with Reduced Components(Institute of Electrical and Electronics Engineers Inc., 2018) Sandeep, N.; Yaragatti, U.R.This letter presents an improved sensorless nine-level inverter topology with reduced number of components. It is formed by cascading a three-level T-Type neutral clamped point inverter with a floating capacitor (FC) fed two-level converter unit. Additionally, two line-frequency switches are appended across the dc-link. A simple logic-form equations-based pulse width modulator is designed which is in-charge of maintaining the FC voltage at its reference value without any aid of voltage and current sensor. Thus, the complexity in control of the proposed topology is very minimal. The working principle of the proposed inverter and formulation of logic-form equations is deliberated in detail. Furthermore, experimental results obtained from the developed prototype are presented to validate feasibility and operability of the proposed topology. Finally, a comprehensive comparison with some of the recently reported inverter topologies proving the merits of the proposed topology is included. © 1986-2012 IEEE.Item Design and Implementation of Transformer-Based Multilevel Inverter Topology with Reduced Components(Institute of Electrical and Electronics Engineers Inc., 2018) Behara, S.; Sandeep, N.; Yaragatti, U.R.This paper presents a nine-level transformer-based inverter requiring only eight switches. The envisaged structure consists of two standard H-bridges fed from a single dc source. Besides, a single-phase transformer is employed to aid the process of intermediate voltage level generation. An ad-hoc pulsewidth modulation scheme based on boolean logic form equations is developed to derive the gating pulses. An effortless extension of the proposed inverter to a higher number of voltage levels is also achieved by generalizing the switching functions. Furthermore, the superior performance of the proposed topology is demonstrated through a comprehensive cost-based analysis. Finally, the validation of the proposed topology is accomplished through experiments on a down-scale prototype, and the measurement results are included. © 1972-2012 IEEE.Item A New Generalized Multilevel Converter Topology Based on Cascaded Connection of Basic Units(Institute of Electrical and Electronics Engineers Inc., 2019) Jagabar Sathik, J.; Shalchi Alishah, R.; Sandeep, N.; Hosseini, S.H.; Babaei, E.; Krishnasamy, K.; Yaragatti, U.R.In this paper, a new single-phase multilevel converter (MLC) topology based on the cascade connection of novel basic units is presented. The proposed basic unit generates 17-level output voltage waveform and can be extended for higher voltage levels by using a simple cascade connection. Both the proposed basic unit and cascaded topologies are compared with other state-of-the-art MLC topologies. From the comparison results, it will be shown that the proposed topology has several advantages such as the reduced number of power electronic components, lesser number of dc sources, and blocking voltage. Moreover, the proposed MLC has reduced power losses and improved efficiency. The operability and feasibility of the proposed converter are validated through extensive simulation and experiments. Finally, the corresponding results affirming the predominance of the proposed topologies are presented. © 2013 IEEE.Item Asymmetric H-Bridge Single-Phase Seven-Level Inverter Topology with Proportional Resonant Controller(Taylor and Francis Ltd, 2019) Salodkar, P.A.; Kulkarni, P.S.; Waghmare, M.A.; Chaturvedi, P.C.; Sandeep, N.This paper presents an asymmetrical H-bridge single-phase seven-level inverter topology with modified gating scheme for reducing the number of high-frequency switches. Due to shortcomings like steady-state error and problems in removing low-order harmonics associated with proportional integral controller, proportional resonant controller is used for grid-connected converter current control. A practical application of proportional resonant current controller is developed using a low-cost dsPIC33EP256MC202 microcontroller to keep the current injected in to the grid. The validity of proposed inverter and control scheme is verified through simulation and implemented for low-voltage laboratory prototype. © 2017, © 2017 IETE.