Faculty Publications
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Item A new nine-level single-DC source-based inverter topology for distributed generation(Institute of Electrical and Electronics Engineers Inc., 2017) Sandeep, N.; Yaragatti, U.R.Multilevel inverter enables to completely remove the passive filtering requirement at the grid interfacing end, resulting in improved efficiency and reduced cost. These features have led to increasing attention towards their application to medium and high-power arena. In this paper, investigation of a hybrid 9-level inverter topology for grid integration of renewable energy sources is presented. The structural details, operating principle, capacitor voltage balancing control and the main features of the proposed inverter are presented. The proposed topology is compared with other similar 9-level converters to emphasize its superior characteristics and performance. Simulation results demonstrating the grid connected operation of the converter for two test cases are presented. The results affirm the effectiveness of the capacitor voltage balancing control in maintaining capacitor voltages at set values, under steady state and transient operation of the converter. © 2016 IEEE.Item Simplified hybrid nine-level stacked multiceli converter with reduced part count for grid-connected applications(IEEE Computer Society, 2017) Sandeep, N.; Yaragatti, U.R.Increasing demand for high-efficiency inverters with improved output waveform quality has enhanced the research in the area of multilevel inverters (MLIs). A dc-ac hybrid inverter formed by cascading a five-level (5L) stacked multicell converter (SMC) and floating capacitor (FC) H-bridge is proposed. It requires only 12 switches and three FCs for nine-level (9L) operation. The most important advantage of the proposed inverter lies in the fact that it requires minimum topological alteration for extending 5L SMC to 9L. FC voltage control strategy and results confirming the effectiveness and operability of the proposed inverter is presented. © 2017 IEEE.Item Design and Implementation of a Sensorless Multilevel Inverter with Reduced Part Count(Institute of Electrical and Electronics Engineers Inc., 2017) Sandeep, N.; Yaragatti, R.Y.This letter proposes a single-phase nine-level (9L) inverter topology suitable for grid-connected renewable energy systems. The proposed inverter is realized using a T-Type neutral-point-clamped inverter connected in cascade to a floating capacitor (FC) H-bridge. Additionally, two low-frequency switches are added across the dc-link enabling the inverter to generate a 9L waveform. A sensorless voltage control based on redundant switching state is developed and embedded with PWM controller, which is responsible for regulating the FC voltage at one-quarter of the dc source voltage. The proposed PWM technique employs the generation of 9L waveform without using any voltage sensor, thereby reducing the complexity of the overall control scheme. This, in turn, will make the overall system appealing for various industrial applications. In comparison to conventional and recent topologies, generation of the 9L waveform using a lower number of components is the notable contribution. Another important feature of the proposed inverter is that if FC H-bridge fails, it can be bypassed, and the inverter can still operate as a 5L inverter at its nominal power rating. Furthermore, a comprehensive comparison study is included which confirms the merits of the proposed inverter against those of other state-of-The-Art topologies. Finally, simulation and experimental results are included for validating the feasibility of the proposed system. © 1986-2012 IEEE.Item Operation and Control of an Improved Hybrid Nine-Level Inverter(Institute of Electrical and Electronics Engineers Inc., 2017) Sandeep, N.; Yaragatti, R.Y.This paper proposes a new nine-level inverter for medium- and high-power applications. The proposed topology comprises of a three-level (3L) active neutral-point-clamped (ANPC) inverter connected in series with a floating capacitor (FC) fed H-bridge. Besides, two additional switches operating at line frequency are appended across the dc link of the 3L ANPC structure. Compared with conventional hybrid cascaded inverters, the primary advantage of this addition is doubling of the resulting root mean square output voltage. This amelioration is achieved while preserving the standard 3L ANPC and H-bridge structures with minimum topological modification. A simple logic-gate-based voltage balancing scheme is developed to regulate the FC voltage. The proposed voltage balancing method is independent of load power factor, inverter modulation index, and can balance the voltage across FC instantaneously. The step-by-step formulation of logical expressions for the generation of gating pulses is deliberated in detail and can be generalized for any n-level inverter. Further, simulation results as well as the experimental measurements obtained from the laboratory prototype are presented to validate the effectiveness and practicability of the proposed configuration. Finally, the notable merits of the proposed inverter over the prior art topologies is established through a comprehensive comparative study. © 1972-2012 IEEE.Item Operation and Control of a Nine-Level Modified ANPC Inverter Topology with Reduced Part Count for Grid-Connected Applications(Institute of Electrical and Electronics Engineers Inc., 2018) Sandeep, N.; Yaragatti, U.R.This paper presents a nine-level active-neutral-point-clamped (ANPC) based multilevel inverter (MLI) topology for grid-connected applications requiring only ten switches. The envisaged structure comprises two parts, namely five-level ANPC unit, and a two-level converter leg whose midpoint is used as another ac terminal. An ad hoc switching state redundancy based modulation strategy is used to ensure that the voltage across the flying capacitor is tightly balanced and is implemented using a look-up table further simplifies the control complexity. The performance and effectiveness of the proposed topology with its control scheme are validated through simulations and experimental tests. Comparison with other MLIs is included to highlight the merits of the proposed topology. From the results, it will be shown that the proposed inverter requires the least part count as compared to other topologies with the same performance and output quality. © 1982-2012 IEEE.Item A Switched-Capacitor-Based Multilevel Inverter Topology with Reduced Components(Institute of Electrical and Electronics Engineers Inc., 2018) Sandeep, N.; Yaragatti, U.R.This letter presents an improved sensorless nine-level inverter topology with reduced number of components. It is formed by cascading a three-level T-Type neutral clamped point inverter with a floating capacitor (FC) fed two-level converter unit. Additionally, two line-frequency switches are appended across the dc-link. A simple logic-form equations-based pulse width modulator is designed which is in-charge of maintaining the FC voltage at its reference value without any aid of voltage and current sensor. Thus, the complexity in control of the proposed topology is very minimal. The working principle of the proposed inverter and formulation of logic-form equations is deliberated in detail. Furthermore, experimental results obtained from the developed prototype are presented to validate feasibility and operability of the proposed topology. Finally, a comprehensive comparison with some of the recently reported inverter topologies proving the merits of the proposed topology is included. © 1986-2012 IEEE.Item Design and Implementation of Transformer-Based Multilevel Inverter Topology with Reduced Components(Institute of Electrical and Electronics Engineers Inc., 2018) Behara, S.; Sandeep, N.; Yaragatti, U.R.This paper presents a nine-level transformer-based inverter requiring only eight switches. The envisaged structure consists of two standard H-bridges fed from a single dc source. Besides, a single-phase transformer is employed to aid the process of intermediate voltage level generation. An ad-hoc pulsewidth modulation scheme based on boolean logic form equations is developed to derive the gating pulses. An effortless extension of the proposed inverter to a higher number of voltage levels is also achieved by generalizing the switching functions. Furthermore, the superior performance of the proposed topology is demonstrated through a comprehensive cost-based analysis. Finally, the validation of the proposed topology is accomplished through experiments on a down-scale prototype, and the measurement results are included. © 1972-2012 IEEE.Item Asymmetric H-Bridge Single-Phase Seven-Level Inverter Topology with Proportional Resonant Controller(Taylor and Francis Ltd, 2019) Salodkar, P.A.; Kulkarni, P.S.; Waghmare, M.A.; Chaturvedi, P.C.; Sandeep, N.This paper presents an asymmetrical H-bridge single-phase seven-level inverter topology with modified gating scheme for reducing the number of high-frequency switches. Due to shortcomings like steady-state error and problems in removing low-order harmonics associated with proportional integral controller, proportional resonant controller is used for grid-connected converter current control. A practical application of proportional resonant current controller is developed using a low-cost dsPIC33EP256MC202 microcontroller to keep the current injected in to the grid. The validity of proposed inverter and control scheme is verified through simulation and implemented for low-voltage laboratory prototype. © 2017, © 2017 IETE.Item A Self-Balancing Five-Level Boosting Inverter with Reduced Components(Institute of Electrical and Electronics Engineers Inc., 2019) Sandeep, N.; Jagabar Sathik, J.S.; Yaragatti, U.R.; Krishnasamy, K.Two-Stage boosting multilevel inverters (MLIs), which are highly suitable for photovoltaic power plants, are known to suffer because of the high voltage stress on the switches of second stage. One of the ways to confront this issue is through eliminating the front-end booster. However, this leads to increased structural and control complexity of the resulting integrated boosting MLI. This letter presents a single-stage boosting MLI requiring lesser number of switches, diodes, and capacitors for renewable power generation applications. It requires nine switches and only one capacitor for five-level voltage generation. The topology has inherent self-balancing capability, thereby does not need additional balancing circuitry. The proposed topology has a uniform peak inverse voltage stress on the switches of value equal to the input dc voltage. A less complicated logic-form-equations-based gating pulse generation scheme is designed for enabling the proposed MLI to maintain its capacitor voltage. Further, a comparative study with state-of-the-art topologies is carried out to demonstrate the superior performance of the proposed topology. Finally, the feasibility of the proposed topology is validated through experimental tests and the corresponding results are elucidated. © 1986-2012 IEEE.Item Switched-Capacitor-Based Quadruple-Boost Nine-Level Inverter(Institute of Electrical and Electronics Engineers Inc., 2019) Sandeep, N.; Jagabar Sathik, J.S.; Yaragatti, U.R.; Krishnasamy, K.This letter describes a novel nine-level inverter based on switched capacitors (SCs) with quadruple-boost ability requiring reduced components. The structure of the proposed topology relies on the series/parallel connection of SCs. It consists of 12 switches and two SCs. As opposed to similar SC-based inverters, the proposed topology does not employ a back-end H-bridge and the voltage stress of all the switches does not exceed twice the input dc voltage. A simple logic-gate-based pulsewidth-modulation scheme is developed for gating the switches of the proposed topology. A comprehensive comparison against the state-of-the-art topologies in terms of the required number of components is performed to attest the outperforming merits of the proposed topology. Finally, various experimental results are presented to validate the feasibility and operability of the proposed topology. © 1986-2012 IEEE.