Faculty Publications
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Item Transformer-Based seven-level inverter with single-dc supply for renewable energy applications(IEEE Computer Society help@computer.org, 2016) Behara, S.; Sandeep, N.; Yaragatti, R.Y.This paper puts forward a single-DC source based seven-level inverter for harvesting energy from renewable sources. Three single-phase transformers with cascaded outputs are powered from the switching power circuit resulting in then generation of multilevel at the output of the inverter. The proposed configuration can generate output voltage having levels of magnitude (-3VDC, -2VDC, -VDC, 0, VDC, 2VDC, 3VDC) from the DC supply (VDC). Structurally this topology exhibits the advantage of fewer power devices in comparison to conventional inverter for the generation of same number of output voltage levels. Simple logic gate based gating pulse generation scheme is suggested obviating the need for complex pulsewidth-modulation (PWM) scheme. Simulation results confirming the viability and effectiveness of the proposed inverter are presented. © 2016 IEEE.Item A new nine-level single-DC source-based inverter topology for distributed generation(Institute of Electrical and Electronics Engineers Inc., 2017) Sandeep, N.; Yaragatti, U.R.Multilevel inverter enables to completely remove the passive filtering requirement at the grid interfacing end, resulting in improved efficiency and reduced cost. These features have led to increasing attention towards their application to medium and high-power arena. In this paper, investigation of a hybrid 9-level inverter topology for grid integration of renewable energy sources is presented. The structural details, operating principle, capacitor voltage balancing control and the main features of the proposed inverter are presented. The proposed topology is compared with other similar 9-level converters to emphasize its superior characteristics and performance. Simulation results demonstrating the grid connected operation of the converter for two test cases are presented. The results affirm the effectiveness of the capacitor voltage balancing control in maintaining capacitor voltages at set values, under steady state and transient operation of the converter. © 2016 IEEE.Item Operation and Control of an Improved Hybrid Nine-Level Inverter(Institute of Electrical and Electronics Engineers Inc., 2017) Sandeep, N.; Yaragatti, R.Y.This paper proposes a new nine-level inverter for medium- and high-power applications. The proposed topology comprises of a three-level (3L) active neutral-point-clamped (ANPC) inverter connected in series with a floating capacitor (FC) fed H-bridge. Besides, two additional switches operating at line frequency are appended across the dc link of the 3L ANPC structure. Compared with conventional hybrid cascaded inverters, the primary advantage of this addition is doubling of the resulting root mean square output voltage. This amelioration is achieved while preserving the standard 3L ANPC and H-bridge structures with minimum topological modification. A simple logic-gate-based voltage balancing scheme is developed to regulate the FC voltage. The proposed voltage balancing method is independent of load power factor, inverter modulation index, and can balance the voltage across FC instantaneously. The step-by-step formulation of logical expressions for the generation of gating pulses is deliberated in detail and can be generalized for any n-level inverter. Further, simulation results as well as the experimental measurements obtained from the laboratory prototype are presented to validate the effectiveness and practicability of the proposed configuration. Finally, the notable merits of the proposed inverter over the prior art topologies is established through a comprehensive comparative study. © 1972-2012 IEEE.Item Design and implementation of active neutralpoint-clamped nine-level reduced device count inverter: An application to grid integrated renewable energy sources(Institution of Engineering and Technology journals@theiet.org, 2018) Sandeep, N.; Yaragatti, U.R.Multilevel inverters are one of the preferred choices in medium-voltage and high-power applications in the recent past. Active neutral-point-clamped (ANPC) inverter is the most popular topology, especially in the class of five-level (5L) inverters. In this study, a nine-level topology with improved output waveform quality is proposed based on ameliorating the 5L ANPC inverter with least modifications. The addition of only two switches operating at line frequency to the conventional 5L ANPC inverter while maintaining an identical precursor part count is the proposed modification. A logic form equation-based active voltage balancing scheme that is independent of load current and power factor is developed to regulate the flying capacitor voltage at the reference value. The operating principle, salient features, and the developed control scheme are comprehensively detailed. The operation of the proposed inverter considering a grid integrated case is simulated in MATLAB/ Simulink, and the results corresponding to steady-state and dynamic conditions are presented. The benefits of the proposed topology are elucidated by comparing it with other classic topologies considering various prominent viewpoints. This comparison has illustrated the proposed topology's distinctive characteristics and profound advantages. The performance validation, feasibility, and practicability of the proposed inverter are established through the experimental results obtained from a laboratory-scale prototype. © The Institution of Engineering and Technology 2017.Item Simplified transformer-based multilevel inverter topology and generalisations for renewable energy applications(Institution of Engineering and Technology journals@theiet.org, 2018) Behara, S.; Sandeep, N.; Yaragatti, U.R.Multilevel inverters (MLIs) generating high-quality voltage waveforms are playing a significant role in renewable energy applications. However, the requirement of higher number of power devices, complex pulse-width-modulation (PWM) and voltage unbalancing issues are the impediments associated with their direct usage. Consequently, several attempts to devise MLIs with lesser number of overall components are witnessed. This study focuses on developing a nine-level inverter comprising of a single transformer and reduced component count. An optimisation of the number of transformers and their turn's ratio for a given number of voltage levels resulting in the least number of switches is investigated and deliberated in detail. Besides, an uncomplicated logic gate-based PWM strategy is developed for generating the gating signals of switches using simple Boolean logic relations. A detailed comparison with other recommended MLI topologies is presented to highlight the notable features of the proposed topology. Simulation results obtained using the model developed in MATLAB/Simulink along with the experimental measurements obtained from a downscale prototype is presented to validate the practicability, effectiveness, and viability of the proposed topology. An explicit agreement among the simulation and experimental results is observed. © The Institution of Engineering and Technology 2017.Item Operation and Control of a Nine-Level Modified ANPC Inverter Topology with Reduced Part Count for Grid-Connected Applications(Institute of Electrical and Electronics Engineers Inc., 2018) Sandeep, N.; Yaragatti, U.R.This paper presents a nine-level active-neutral-point-clamped (ANPC) based multilevel inverter (MLI) topology for grid-connected applications requiring only ten switches. The envisaged structure comprises two parts, namely five-level ANPC unit, and a two-level converter leg whose midpoint is used as another ac terminal. An ad hoc switching state redundancy based modulation strategy is used to ensure that the voltage across the flying capacitor is tightly balanced and is implemented using a look-up table further simplifies the control complexity. The performance and effectiveness of the proposed topology with its control scheme are validated through simulations and experimental tests. Comparison with other MLIs is included to highlight the merits of the proposed topology. From the results, it will be shown that the proposed inverter requires the least part count as compared to other topologies with the same performance and output quality. © 1982-2012 IEEE.Item Design and Implementation of Transformer-Based Multilevel Inverter Topology with Reduced Components(Institute of Electrical and Electronics Engineers Inc., 2018) Behara, S.; Sandeep, N.; Yaragatti, U.R.This paper presents a nine-level transformer-based inverter requiring only eight switches. The envisaged structure consists of two standard H-bridges fed from a single dc source. Besides, a single-phase transformer is employed to aid the process of intermediate voltage level generation. An ad-hoc pulsewidth modulation scheme based on boolean logic form equations is developed to derive the gating pulses. An effortless extension of the proposed inverter to a higher number of voltage levels is also achieved by generalizing the switching functions. Furthermore, the superior performance of the proposed topology is demonstrated through a comprehensive cost-based analysis. Finally, the validation of the proposed topology is accomplished through experiments on a down-scale prototype, and the measurement results are included. © 1972-2012 IEEE.Item Asymmetric H-Bridge Single-Phase Seven-Level Inverter Topology with Proportional Resonant Controller(Taylor and Francis Ltd, 2019) Salodkar, P.A.; Kulkarni, P.S.; Waghmare, M.A.; Chaturvedi, P.C.; Sandeep, N.This paper presents an asymmetrical H-bridge single-phase seven-level inverter topology with modified gating scheme for reducing the number of high-frequency switches. Due to shortcomings like steady-state error and problems in removing low-order harmonics associated with proportional integral controller, proportional resonant controller is used for grid-connected converter current control. A practical application of proportional resonant current controller is developed using a low-cost dsPIC33EP256MC202 microcontroller to keep the current injected in to the grid. The validity of proposed inverter and control scheme is verified through simulation and implemented for low-voltage laboratory prototype. © 2017, © 2017 IETE.Item A Single DC Source Nine-Level Switched-Capacitor Boost Inverter Topology with Reduced Switch Count(Institute of Electrical and Electronics Engineers Inc., 2020) Siddique, M.D.; Alamri, B.; Salem, F.A.; Orabi, M.; Mekhilef, S.; Shah, N.M.; Sandeep, N.; Jagabar Sathik, J.S.; Iqbal, A.; Ahmed, M.; Ghoneim, S.S.M.; Al-Harthi, M.M.This paper presents a new boost inverter topology with nine level output voltage waveform using a single dc source and two switched capacitors. The capacitor voltages are self-balancing and thus is devoid of any sensors and auxiliary circuitry. The output voltage is twice higher than the input voltage, which eliminates the need for an input dc boost converter especially when the inverter is powered from a renewable source. The merits of the proposed topology in terms of the number of devices and cost are highlighted by comparing the recent and conventional inverter topologies. In addition to this, the total voltage stress of the proposed topology is lower and have a maximum efficiency of 98.25%. The operation and dynamic performance of the proposed topology have been simulated using PLECS software and are validated using an experimental setup considering a different dynamic operation. © 2013 IEEE.Item Seven-level boosting active neutral point clamped inverter using cross-connected switched capacitor cells(Institution of Engineering and Technology jbristow@theiet.org, 2020) Jagabar Sathik, M.J.; Sandeep, N.; Almakhles, D.; Bhatnagar, K.; Yang, Y.; Blaabjerg, F.In this study, an active neutral point clamped-type boosting switched-capacitor multilevel inverter (SCMLI) with selfvoltage balancing capability is proposed. In the proposed topology, a novel switched capacitor cell is used, which has eightswitches and two diodes. The presented topology has reduced power component count with self-boosting and balancingabilities. The distinctive features of the proposed topology are highlighted and benchmarked against other recent 7L-SCMLItopologies. To validate the feasibility of the proposed topology, experimental tests are performed on a 1 kW prototype hardwaresetup. © 2020 The Institution of Engineering and Technology.