Faculty Publications
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Publications by NITK Faculty
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Item Low power fully differential, feed-forward compensated bulk driven OTA(2011) Rekha, S.; Laxminidhi, T.A low voltage, low power bulk driven Operational Transconductance Amplifier (OTA) is designed in 180 nm CMOS Technology. The OTA employs feed-forward compensation achieving open loop DC gain of 44.05 dB, 3 dB bandwidth of 408 kHz, Unity Gain Bandwidth (UGB) of 9.07 MHz. OTA is stable with phase margin of 45° and a gain margin of 66 dB for a pure capacitive load of 1 pF. OTA operates on 0.5 V supply consuming a power of 30 μW. © 2011 IEEE.Item Effect of finite gain and bandwidth of feed-forward compensated OTA on active-RC integrators: A case study(2012) Rekha, S.; Laxminidhi, T.This paper analyses the effect of finite gain-bandwidth of the operational transconductance amplifiers (OTAs) on active-RC integrators. A feed-forward compensated OTA is taken as the building block of active-RC integrator. A mathematical analysis is carried out on a first order low-pass active-RC filter designed in 180 nm CMOS technology to operate at a supply voltage of 0.5 V. A non-ideality factor (NIF) has been defined that accounts for the deviation of the response from the ideal. Simulations performed on the transistor level filter justifies the mathematical analysis presented. © 2012 IEEE.Item Effect of parasitics of feed-forward compensated OTA on Active-RC integrators(2013) Rekha, S.; Laxminidhi, T.This paper analyzes the effect of parasitics of the Operational transconductance Amplifiers (OTAs) on Active-RC Integrators. The analysis is carried out for an Active-RC integrator built around a feed-forward compensated OTA designed in 180 nm CMOS technology to operate at a supply voltage of 0.5 V. A non-ideality factor (NIF) has been defined that accounts for the deviation of the response of the Active-RC integrator from the ideal. Simulations performed on the transistor level integrator justifies the mathematical analysis presented. © 2013 Springer Science+Business Media New York.Item Ultra low power active-RC filter in 180 nm CMOS technology(2013) Rekha, S.; Laxminidhi, T.This paper presents the design of a low voltage, ultra low power fifth order Chebyshev low pass filter operating at a power supply voltage of 0.5 V in 180 nm CMOS technology. A CMOS inverter based transconductor is used as the building block. A sub-threshold model is developed for the transconductor as the transistors are operating in sub-threshold region. A feedforward compensated OTA is designed using this transconductor and is used to realize the filter. Designed filter has a cutoff frequency of 150 kHz and offers a dynamic range of 54.16 dB with a figure of merit of 0.02 fJ. Power consumed by the filter is 21.79 microwatt. © 2013 IEEE.Item Low voltage, low power transconductor for low frequency Gm-C filters(Springer Verlag service@springer.de, 2017) Hanumantha Rao, G.; Rekha, S.A low voltage, low power bulk-driven transconductor for low frequency Transconductance-C (Gm - C) filters filters is proposed. The transconductor is designed in UMC 180nm technology with supply voltage of 0.5V. The transconductance (Gm) is tunable from 12nS to 100nS, which is suitable for low frequency Gm - C filters. The power consumption is 120 nW. As an application, a 2nd order Butterworth low pass filter (LPF) with cutoff frequency tunable from 110Hz to 960Hz is designed. © Springer Nature Singapore Pte Ltd 2017.Item Fast startup crystal oscillator design(Institute of Electrical and Electronics Engineers Inc., 2018) Kumar, P.; Rekha, S.Generating the clock that is reliable, accurate and available as soon as the power is up is very essential for any application that requires the time base reference. For generating these clocks, crystal oscillator is a very good option. But usually the crystal oscillator circuit suffers from slow startup. Therefore, it is essential to improve the startup time with optimally controlled crystal drive such that crystal drive power rating is not compromised. We propose a method that discusses about increasing the negative resistance during startup using a startup circuit for fast start. Once the reliable startup is achieved, the startup circuit is disconnected for lower negative resistance in stable operation mode. In the 32768 Hz real time clock generating oscillator, the startup time can be improved from 330 ms to 220 ms using the conventional startup method. With the proposed method, lesser startup time of 160 ms is achieved. © 2017 IEEE.Item Low voltage current reference circuit with low temperature coefficient(Institute of Electrical and Electronics Engineers Inc., 2018) Amaljith, M.K.; Hanumantha Rao, G.; Rekha, S.Current references are necessary building blocks of every integrated circuit where they are used for biasing analog circuits such as filters, oscillators, phase locked loops, etc. This paper describes the design of a low voltage, low power 10 nA current reference. The proposed current reference circuit is based on a simple design methodology which uses the principle of subtraction of two positive temperature coefficient currents. The circuit is made to operate in sub-threshold region with a supply voltage of 0.5 V. The proposed circuit has been designed and simulated in Cadence Virtuoso with gpdk 180-nm CMOS process. The temperature coefficient of the reference current is 186 ppm/° C over a range from 0 to 80° C and the variation with supply voltage is 8.02%/V. The total power consumption of the circuit is as low as 45.887 nW. © 2018 IEEE.Item Library Characterization: Noise and Delay Modeling(Institute of Electrical and Electronics Engineers Inc., 2018) Raj, R.; Bhat, M.S.; Rekha, S.In this paper, we propose new models for noise and delay of gates, which are two significant p arameters for characterizing a cell library. Supply noise and coupling noise contribute greatly to overall noise in a circuit. With scaling down of technology, coupling noise has been very significant. Hence, it is necessary to model this noise for analysis purposes. Modeling involves characterization of significant n oise parameters such as Noise propagation characteristics and Noise Immune Characteristics. Noise Immunity curve characterized using Noise bump height only method leads to fast modeling. We propose a novel method for delay modeling using FFT spectrum of output signal. The cell delay characterization is done by extracting the relationship between delay and the width of the main lobe of FFT spectrum of the response of the system for a narrow input pulse. © 2018 IEEE.Item A Scheme for efficient and equitable use of public utilities through supervisory and distributed control(Institute of Electrical and Electronics Engineers Inc., 2018) Shreenivasa, K.; Bhat, M.S.; Rekha, S.Clean water and electricity are the two major public utilities for any society and it is the responsibility of each consumer to use these resources efficiently and minimize the wastage. This paper presents a distributed control scheme to address these issues for each utility. In this scheme, wireless sensor network is used for on-line monitoring and automated control of water in overhead tanks. In a similar way, using energy meters and intelligent circuit breakers, the power consumption is remotely monitored and power delivery is automated. A cloud based user application is developed through which authorized operators can view the complete data of water flow as well as energy consumption at desired locations on a single graphical user interface (GUI). The distributed control is developed using Internet enabled embedded boards along with sensors and supporting network nodes. IBM's Watson IoT platform is used for data acquisition, analysis and control. © 2018 IEEE.Item A 1-V, 8.6-nA Resistor-less PTAT Current Reference with Startup Circuit(Institute of Electrical and Electronics Engineers Inc., 2018) Kumar, S.; Rao, H.G.; Rekha, S.A low voltage, low current, Proportional To Absolute Temperature (PTAT) current reference circuit is proposed. The conventional PTAT circuit is exploited to operate with a supply voltage of 1 V with suitable modifications in the circuit. Resistor has been replaced by an active circuit. All the devices are operating in weak inversion region. Zero static power startup circuit has been proposed to conform the proper initialization of the circuit. This PTAT current generator generates 8.6 nA of current at 1 V supply at room temperature. It is observed that the supply voltage sensitivity is as low as 7 percent per volt. © 2018 IEEE.