Faculty Publications

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    Single-Phase Six-Switch Four-Port Boost Inverter With Active Power Decoupling
    (Institute of Electrical and Electronics Engineers Inc., 2024) Ramanarayana Reddy, M.; Dastagiri Reddy, B.; Prabhakaran, P.; Kishan, D.
    This letter proposes a novel single-phase six-switch four-port boost inverter with active power decoupling (6S4PwA). The four ports are two dc ports, an ac port, and a ripple port that acts as an active power decoupling (APD) circuit. A novel hybrid modified sinusoidal pulsewidth modulation (HMSPWM) scheme is proposed to operate the 6S4PwA. The proposed topology along with the HMSPWM scheme achieves high voltage gains at both the dc and ac ports and also eliminates the double-frequency ripple at dc ports. The ac film capacitor employed at the ripple port absorbs the 2ω ripple component, thereby eliminating dc-link voltage and inductor current ripples at two dc ports. Hence, the size of the dc-link capacitor and inductor at dc ports is reduced significantly. Overall, the proposed topology employs fewer components for four ports and reduces the size of passive elements, resulting in improved power density and reduced cost. To evaluate the performance of the proposed topology, a 500-W prototype is fabricated and tested. The experimental results show that the converter attains boost, inverter, and APD operations in a single stage and also improves power quality at the ac port. © 1986-2012 IEEE.
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    Implementation of a novel nine-level double boosting multi-level inverter
    (Springer Science and Business Media Deutschland GmbH, 2025) Maheswari, G.; Manjunatha Sharma, K.M.; Prabhakaran, P.
    Switched capacitor multi-level inverter topologies have garnered the attention of industrial power electronics researchers due to their potential in different industrial and renewable energy source applications. This paper proposes a novel nine-level, twofold voltage gain boost (9L2x) inverter designed for photovoltaic (PV) applications, addressing common challenges in transformer-less multi-level grid-tied PV inverters, such as leakage current and output voltage bucking. This design utilizes switched capacitors (SC) with a common ground, achieving a twofold voltage boost without needing an extra boost converter. The proposed topology reduces the active switch count, enhances power density, and lowers costs while ensuring self-balancing SCs and minimizing total standing voltage. The common grounding mitigates leakage current, making the system more efficient. The proposed topology features a diode-inductor circuit at the input DC side to reduce inrush current, decrease capacitor voltage ripples, reduce the total harmonic distortion of the MLI output voltage, and improve efficiency. A proportional-integral controller manages active grid power, and a modulation strategy ensures SC voltage balance. The paper delves into intricate details concerning the inverter’s circuitry, control methodologies, and pulse-width modulation scheme. This nine-level inverter design is thoroughly validated through extensive simulations and practical hardware-in-the-loop experiments. The results consistently affirm the effectiveness and feasibility of this novel inverter, positioning it as a significant advancement over existing nine-level inverters. © The Author(s), under exclusive licence to Springer-Verlag GmbH Germany, part of Springer Nature 2024.