Faculty Publications

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    Hardware Prototype for Portable Automatic MPPT Solar Charger Using Buck Converter and PSO Technique
    (Institute of Electrical and Electronics Engineers Inc., 2022) Parandhaman, M.; Annambhotla, L.T.S.; Parthiban, P.
    This paper presents hardware construction and testing of portable Maximum Power Point Tracking ((MPPT) devices. MPPT implementations utilize algorithms that read panel voltages and currents, and then calculate the maximum power available at that particular time. The Perturb and Observe (P& O) method needs a periodic sweep along the power curve to detect the maxima( can be local or global). The time taken to converge at MPP is significant, and thus the efficiency of conversion is drastically reduced. This work incorporates Particle Swarm Optimization (PSO) technique in replacement with the traditional P& O method to enhance the tracking speed and ensure the global maxima is achieved. In PSO technique, multiple search elements are introduced and a quantitative decision is evaluated among these search elements, and thus the convergence speed is increased by a factor of the number of elements used in the search. The hardware construction is compact and reliable, enhancing its application in various fields like unmanned aerial vehicles for long endurance The simulation studies were conducted on MATLAB / Simulink, and hardware design of the same was implemented. Contributions were made in finding practical testing and validation procedures for customized MPPT devices. © 2022 IEEE.
  • Item
    Non-Isolated Power Factor Corrected AC/DC Converter with High Step-Down Voltage Ratio for Low-Power Applications
    (Hindawi Limited, 2022) Annambhotla, L.T.S.; Parthiban, P.
    This paper proposes a high step-down ratio AC-DC converter employing a quadratic buck converter with power factor correction. Conventional active power factor correction topologies employ boost-based correction schemes for unity power factor operation. This will require a steeper step-down ratio and higher switch voltage stress apart from complexity in the control scheme with sensors. The structure of the proposed topology is developed by combining the power factor correction stage with a high step-down stage. The passive input filter is split up into two for the purpose of reducing the thermal heating apart from offering a higher power factor. A single switch operation reduces the complexity of the control scheme. In addition, the number of conducting devices during the current path is also the same as the conventional buck converter due to cascading and hence offers lower conduction losses. The need for the converter to operate at an extremely low duty cycle is reduced due to the quadratic stage structure. The proposed converter operates at a moderate duty cycle, offering higher step-down voltage apart from reducing filtering requirements. MATLAB R2020b is used for carrying out simulation studies. Xilinx FPGA-based controller using system generator is implemented for the generation of pulses of appropriate duty cycle. Simulation and experimental results for a 150 W prototype are presented. An investigation and comparative evaluation of the conventional bridgeless buck system with the quadratic buck converter are carried out. The proposed structure offers the benefit of a higher step-down voltage ratio incorporating an inherent power factor correction stage along with the AC/DC stage. © 2022 Lalitha T. S. Annambhotla and P. Parthiban.