Faculty Publications

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  • Item
    Development of cascaded multilevel inverter based active power filter with reduced transformers
    (China Power Supply Society, 2020) Nageswar Rao, B.N.; Yellasiri, Y.; Panda, A.K.; Shiva Naik, B.S.; Jammala, V.
    Active power filter is a power electronic converter used for improving the quality of supply by eliminating the effect of harmonics due to non-linear loads. This paper recommends a concept for shunt active power filter (SAPF) using a single power source fed to a cascaded multilevel inverter (CMI) with 3-? transformers. Apart from traditional transformer based topologies, the required number of transformers are substantially reduced, resulting in less space requirement, which leads to low cost and simple control system. The proposed CMI based SAPF has a capacity to compensate for contaminated load with high harmonic and a low power factor. The effective id ? iq theory is used to calculate compensation currents. DC link voltage regulator analyzed through delay time and controller gain. The tasks of the controller in the SAPF can perform all necessary actions for correct operation in SAPF. A wide range of computer simulation results demonstrated and validated the results with the prototype experimental setup. © 2021 All rights reserved.
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    A novel nine-level boost inverter with a low component count for electric vehicle applications
    (John Wiley and Sons Ltd, 2021) Shiva Naik, B.S.; Yellasiri, Y.; Aditya, K.; Nageswar Rao, B.N.
    In electric vehicles (EVs), considerable battery cells are cascaded in series for motor driving to improve the output voltage. The series combination of battery cells causes challenges like isolation of faulty cells, voltage unbalance, and slow charge equalization. Therefore, state-of-charge (SOC) and voltage equalization circuits are often used in industries to protect the battery cells. A nine-level inverter circuit with a double voltage boost is proposed to reduce the above issues based on the switch-capacitor (SC) principle. Unique features like self-balancing, voltage boosting are attained, which cannot be achieved through traditional inverters. The proposed topology can operate at a wide range of modulation indices ((Formula presented.)) to produce different voltage levels. The absence of a back-end H-bridge in the proposed circuit offers low voltage stress across the semiconductors. The operating principle, capacitor sizing, and modulation approach are presented. Further, experimental tests are conducted at different loading conditions to verify the performance of the proposed circuit. © 2021 John Wiley & Sons Ltd.
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    A Novel Quadruple Boost Inverter With New Optimized Fuzzy-Based Switching Scheme
    (Institute of Electrical and Electronics Engineers Inc., 2024) Aditya, K.; Yellasiri, Y.; Shiva Naik, B.S.; Nageswar Rao, B.N.; Panda, A.K.
    This brief proposes a novel quadruple boost nine-level inverter (QB-NLI) and an optimized switching pattern using fuzzy logic controller. The suggested method simplifies the traditional approach by removing the conventional logic gate circuit design. The pulse signal generator and lookup table are both derived using a fuzzy logic pulse generator. Fuzzy logic controller (FLC) and Controlled membership functions (MFs) rules open numerous prospects for generating pulses based on the input as modulation index. The suggested technique is examined on the proposed QB-NLI topology using the selective harmonic elimination PWM method. MFs are created based on averaging Newton Rapson and quantizer firing angles for diverse modulation index (mi) values. The proposed QB-NLI structure comprises ten switches with one dc-voltage source and two capacitors. The proposed structure's circuit description, modes of operation, proper component selection, and a new fuzzy-based switching scheme are presented. Further, a discussion about the comparative analysis of the proposed switching technique with other switching techniques concerning THD and RMS voltages is presented. In addition to the simulation results, experimental tests are conducted under various load conditions on the built-in hardware prototype to evaluate the proposed QB-NLI structure and switching technique. © 2023 IEEE.