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Item Design and implementation of seven-level inverter for grid-tied photovoltaic systems(Taylor and Francis Ltd., 2025) Maheswari, G.; Manjunatha Sharma, K.M.; P, P.Multi-level inverters without transformer coupling are growingly popular for solar uses because of their compact design, minimised voltage stress, and improved efficiency. In this paper, the proposed novel triple-boost 7-level inverter is optimised for seamless integration with the grid. The proposed inverter employs self-regulating switched-capacitors to achieve a threefold voltage amplification, effectively eliminating the need for an independent boost converter stage. This architecture benefits low-voltage PV systems by improving efficiency, reducing cost, and ensuring superior performance. Moreover, the 7-level inverter adopts a common-ground topology, effectively mitigating leakage currents in PV system applications. The paper elaborates on the operational modes of the proposed inverter and the design of a current controller tailored for a grid-tied PV-based seven-level inverter. Additionally, simulation and experimental validation are conducted utilising hardware-in-the-loop (HIL) methods to evaluate system performance. Finally, a comprehensive comparative analysis is presented between the proposed seven-level inverter and existing seven-level inverters, highlighting the advantages of the proposed inverter design. © 2025 Informa UK Limited, trading as Taylor & Francis Group.Item Implementation of a novel nine-level double boosting multi-level inverter(Springer Science and Business Media Deutschland GmbH, 2025) Maheswari, G.; Manjunatha Sharma, K.M.; Prabhakaran, P.Switched capacitor multi-level inverter topologies have garnered the attention of industrial power electronics researchers due to their potential in different industrial and renewable energy source applications. This paper proposes a novel nine-level, twofold voltage gain boost (9L2x) inverter designed for photovoltaic (PV) applications, addressing common challenges in transformer-less multi-level grid-tied PV inverters, such as leakage current and output voltage bucking. This design utilizes switched capacitors (SC) with a common ground, achieving a twofold voltage boost without needing an extra boost converter. The proposed topology reduces the active switch count, enhances power density, and lowers costs while ensuring self-balancing SCs and minimizing total standing voltage. The common grounding mitigates leakage current, making the system more efficient. The proposed topology features a diode-inductor circuit at the input DC side to reduce inrush current, decrease capacitor voltage ripples, reduce the total harmonic distortion of the MLI output voltage, and improve efficiency. A proportional-integral controller manages active grid power, and a modulation strategy ensures SC voltage balance. The paper delves into intricate details concerning the inverter’s circuitry, control methodologies, and pulse-width modulation scheme. This nine-level inverter design is thoroughly validated through extensive simulations and practical hardware-in-the-loop experiments. The results consistently affirm the effectiveness and feasibility of this novel inverter, positioning it as a significant advancement over existing nine-level inverters. © The Author(s), under exclusive licence to Springer-Verlag GmbH Germany, part of Springer Nature 2024.Item Novel sorted PWM strategy and control for photovoltaic-based grid-connected cascaded H-bridge inverters(Springer, 2025) Maheswari, G.; Manjunatha Sharma, K.M.; Prabhakaran, P.This paper proposes a novel sorted level-shifted U-shaped carrier-based pulse width modulation (SLSUC PWM) strategy combined with an input power control approach for a 13-level cascaded H-bridge multi-level inverter designed for grid connection, specifically tailored for photovoltaic (PV) systems, which avoids a double-stage power conversion configuration. In this methodology, every inverter generates a quasi-square output voltage waveform with a width that is intricately linked to the output power of its corresponding PV panel. The application of this SLSUC pulse width modulation technique with input power control in a solar energy-based 13-level grid-tied inverter facilitates precise maximum power point (MPP) tracking for each of the PV panels under uniform and non-uniform irradiation conditions and ensures the consistent maintenance of capacitor voltage balance. Moreover, this novel SLSUC PWM method for 13-level inverters offers a range of benefits, including a low total harmonic distortion (THD) in the output voltage of the multi-level inverter and higher inverter and MPPT efficiencies over the existing PWM techniques. To verify the efficacy of the proposed control method over existing techniques, a PV-based grid-connected multi-level inverter with the proposed control strategy undergoes modeling and simulation using MATLAB/Simulink. Then, experimental hardware-in-the-loop (EHIL) testing is conducted to confirm and evaluate its effectiveness. © The Author(s) under exclusive licence to The Korean Institute of Power Electronics 2024.Item A Novel Seven-Level Triple-Boost Inverter for Grid-Integrated Photovoltaic Systems(Springer, 2025) Maheswari, G.; Manjunatha Sharma, K.M.; P, P.Transformer-less switched-capacitor-based multilevel inverters (TL-SCMLIs) are increasingly preferred for photovoltaic (PV) applications due to their voltage boosting capability, high efficiency, reduced dv/dt stress, and lower cost. However, existing SC-based multi-level inverters often require more components, suffer from leakage currents, have lower boost gain capability, have higher PU total standing voltage, and exhibit lower efficiency. To address these challenges, this paper proposes a novel seven-level switched-capacitor (SC)-based TL-MLI with higher voltage boosting gain and a common ground (CG) configuration for improved performance in grid-tied PV applications. A proportional-integral (PI) controller is designed for the grid-tied seven-level PV inverter, and its performance is evaluated through simulation studies and hardware-in-the-loop (HIL) experimental verification. Finally, a detailed comparative analysis with existing multi-level inverters highlights the proposed seven-level inverter’s advantages, including leakage current reduction, high boost gain, lower cost, lower PU total standing voltage, lower voltage stress, lower peak inverse voltage, and improved efficiency. The total harmonic distortion (THD) of the grid current is less than 5% for the proposed grid-tied seven-level inverter. © The Author(s), under exclusive licence to Springer Nature Singapore Pte Ltd. 2025.