Faculty Publications
Permanent URI for this communityhttps://idr.nitk.ac.in/handle/123456789/18736
Publications by NITK Faculty
Browse
Search Results
Item Design and implementation of seven-level inverter for grid-tied photovoltaic systems(Taylor and Francis Ltd., 2025) Maheswari, G.; Manjunatha Sharma, K.M.; P, P.Multi-level inverters without transformer coupling are growingly popular for solar uses because of their compact design, minimised voltage stress, and improved efficiency. In this paper, the proposed novel triple-boost 7-level inverter is optimised for seamless integration with the grid. The proposed inverter employs self-regulating switched-capacitors to achieve a threefold voltage amplification, effectively eliminating the need for an independent boost converter stage. This architecture benefits low-voltage PV systems by improving efficiency, reducing cost, and ensuring superior performance. Moreover, the 7-level inverter adopts a common-ground topology, effectively mitigating leakage currents in PV system applications. The paper elaborates on the operational modes of the proposed inverter and the design of a current controller tailored for a grid-tied PV-based seven-level inverter. Additionally, simulation and experimental validation are conducted utilising hardware-in-the-loop (HIL) methods to evaluate system performance. Finally, a comprehensive comparative analysis is presented between the proposed seven-level inverter and existing seven-level inverters, highlighting the advantages of the proposed inverter design. © 2025 Informa UK Limited, trading as Taylor & Francis Group.Item A sorted modified multi-reference PWM technique for solar PV panel companion grid-tied inverters(Springer Science and Business Media Deutschland GmbH, 2025) Maheswari, G.; Manjunatha Sharma, K.M.; Prabhakaran, P.Pulse Width Modulation (PWM) techniques are increasingly vital in solar energy-driven grid-tied companion inverters, significantly enhancing power quality. This paper proposes the Sorted Modified Multireference Pulse Width Modulation (SMMR PWM) technique. The SMMR PWM with a Maximum PowerPoint Tracking (MPPT) control strategy is implemented in a Solar PV Panel Companion Grid-Tied Inverter (SPPCGTI) system featuring single-stage power conversion. In the SPPCGTI system, each inverter's output voltage adopts a quasi-square waveform, where the pulse width correlates with the power generated by the associated solar PV panel. By employing the SMMR PWM technique with the MPPT control strategy in the SPPCGTI system, precise MPPT for each PV panel is achieved, irrespective of uniform or non-uniform irradiation conditions. Additionally, this technique reduces Total Harmonic Distortion (THD) in the AC grid current of the solar PV panel companion inverter (SPPCI) while simultaneously enhancing MPPT efficiency, inverter efficiency [inverter efficiency is less than the Sorted-Staircase Modulation (SSCM) and more than the Sorted PWM (SoPWM)], and reducing settling time compared to the existing techniques like SSCM and SoPWM. The SPPCGTI with the integrated SMMR PWM technique, MPPT algorithm, and current controller is modeled and simulated in MATLAB/Simulink. Experimental testing affirms the outstanding performance of the proposed SMMR PWM technique. © The Author(s), under exclusive licence to Springer-Verlag GmbH Germany, part of Springer Nature 2024.Item Implementation of a novel nine-level double boosting multi-level inverter(Springer Science and Business Media Deutschland GmbH, 2025) Maheswari, G.; Manjunatha Sharma, K.M.; Prabhakaran, P.Switched capacitor multi-level inverter topologies have garnered the attention of industrial power electronics researchers due to their potential in different industrial and renewable energy source applications. This paper proposes a novel nine-level, twofold voltage gain boost (9L2x) inverter designed for photovoltaic (PV) applications, addressing common challenges in transformer-less multi-level grid-tied PV inverters, such as leakage current and output voltage bucking. This design utilizes switched capacitors (SC) with a common ground, achieving a twofold voltage boost without needing an extra boost converter. The proposed topology reduces the active switch count, enhances power density, and lowers costs while ensuring self-balancing SCs and minimizing total standing voltage. The common grounding mitigates leakage current, making the system more efficient. The proposed topology features a diode-inductor circuit at the input DC side to reduce inrush current, decrease capacitor voltage ripples, reduce the total harmonic distortion of the MLI output voltage, and improve efficiency. A proportional-integral controller manages active grid power, and a modulation strategy ensures SC voltage balance. The paper delves into intricate details concerning the inverter’s circuitry, control methodologies, and pulse-width modulation scheme. This nine-level inverter design is thoroughly validated through extensive simulations and practical hardware-in-the-loop experiments. The results consistently affirm the effectiveness and feasibility of this novel inverter, positioning it as a significant advancement over existing nine-level inverters. © The Author(s), under exclusive licence to Springer-Verlag GmbH Germany, part of Springer Nature 2024.