Faculty Publications
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Item Widely programmable high-frequency active RC filters in CMOS technology(Institute of Electrical and Electronics Engineers Inc., 2009) Laxminidhi, T.; Prasadu, V.; Pavan, S.We propose a circuit technique that enables the realization of widely programmable high-frequency active RC filters in CMOS technology. A fifth-order Chebyshev ladder filter having a digitally programmable 3-dB bandwidth (from 44 to 300 MHz) is used as a vehicle to validate our ideas. The opamp uses feedforward compensation for achieving high dc gain and wide bandwidth. The integrating resistors are realized as a series combination of a triode-operated MOSFET and a fixed polysilicon resistor. A charge-pump-based servo loop servoes the integrating resistor to a stable off-chip resistor. The principle of "constant capacitance scaling"is applied to the opamp and the integrating resistors so that the shape of the frequency response is maintained when the bandwidth is scaled over a 7 7times; range. The filter core, designed in a 0.18-?m CMOS process, consumes 54 mW from 1.8-V supply and has a dynamic range of 56.6 dB. © 2009 IEEE.Item Low voltage, low power chebyshev filter in 0.18 ?m cmos technology(2013) Rekha, S.; Laxminidhi, T.This paper presents an active-RC continuous time filter in 0.18 ?m standard CMOS technology intended to operate on a very low supply voltage of 0.5 V. The filter designed, has a 5th order Chebyshev low pass response with a bandwidth of 477 kHz and 1-dB passband ripple. A low-power operational transconductance amplifier (OTA) is designed which makes the filter realizable. The OTA uses bulk-driven input transistors and feed-forward compensation in order to increase the Dynamic Range and Unity Gain Bandwidth, respectively. The paper also presents an equivalent circuit of the OTA and explains how the filter can be modeled using descriptor state-space equations which will be used for design centering the filter in the presence of parasitics. The designed filter offers a dynamic range of 51.3 dB while consuming a power of 237 ?W. © 2013 World Scientific Publishing Company.Item Widely tunable low-pass gm ? C filter for biomedical applications(Institution of Engineering and Technology journals@theiet.org, 2019) Jayaram Reddy, J.R.M.; Laxminidhi, T.This study presents a fourth-order, low-pass Butterworth transconductor–capacitor gm ? C filter with tunable bandwidth for biomedical signal processing front-ends. An architecture has been proposed for realising very low transconductance values with tunability. This transconductor architecture makes it possible to realise a fully differential filter without the need for explicit common-mode feedback circuit. The filter has two tuning schemes, a resistor-based tuning (Rtuning) and a switched transconductor-based tuning (D-tuning). With R-tuning, the bandwidth is adjustable between 1 and 70 Hz and with D-tuning, the tuning range is 30 mHz–100 Hz. The filter has been designed in united microelectronics corporation (UMC) 0.18 µm complementary metal–oxide–semiconductor process. In terms of figure-of-merit, the proposed filter is found to be on par with the filters reported in the literature. © The Institution of Engineering and Technology 2018Item 1.8 V, 25.9 nW, 91.86 dB dynamic range second-order lowpass filter tunable in the range 4-100 Hz(Institution of Engineering and Technology kvukmirovic@theiet.org, 2019) Reddy, J.R.M.K.; Laxminidhi, T.A second-order lowpass Butterworth filter with tunable bandwidth capable of offering a dynamic range of 91.86 dB operating on a supply voltage of 1.8 V is presented. The proposed filter is based on a sub-threshold source follower. The transistor bias currents are switched to enable the bandwidth tuning in the range 4-100 Hz. A proportional to absolute temperature (PTAT) current reference circuit helps to keep the bandwidth intact across process, voltage and temperature variations. The filter, designed in 0.18 ?m standard CMOS process, consumes 25.9 nW making it a potential candidate for portable biomedical applications. © The Institution of Engineering and Technology 2019.Item Low mismatch high-speed charge pump for high bandwidth phase locked loops(Elsevier Ltd, 2021) Lad Kirankumar, H.; Rekha, S.; Laxminidhi, T.This paper presents a low mismatch high-speed charge pump for high bandwidth phase locked loop (PLL). A novel mismatch compensation technique is used for reducing the current mismatch without having any extra area and power overhead. Proposed circuit is designed for 100 ?A charge pump current (ICP) and it achieves less than 1% mismatch current across all process corners for an output voltage compliance range of 0.2–1 V. A prototype circuit of 1 GHz PLL is designed in 65 nm CMOS technology for testing the proposed charge pump. It achieves ?81.2 dBc spur-level at reference frequency of 250 MHz. In locked condition of the PLL, proposed charge pump consumes 176 ?W power from 1.2 V supply including the reference current. Area occupied by proposed design is 72 × 35 ?m2. © 2021 Elsevier Ltd