Faculty Publications
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Item Design of a New Single-Phase 15-Level Inverter with Minimized Components(Institute of Electrical and Electronics Engineers Inc., 2023) Nageswar Rao, B.N.; Yellasiri, Y.; Shiva Naik, B.S.; Aditya, K.; Karunakaran, E.; Kumar, M.V.Multilevel inverters (MLI) provide a number of challenges, the most significant of which is the requirement for a high number of power semiconductors and separate dc supplies to assimilate renewable energy into a grid successfully. Because of this, reducing the number of components used in these kinds of inverters is quite important. Because transformer-based multilevel inverters (TBMIs) have become more commonplace, the use of many dc supplies in the cascaded inverter is no longer necessary for the device to function. Based on the outcomes of this study, a new transformer-based MLI with fifteen levels (15L) and eight switches can be built with only one dc source required. The suggested MLI consists of three isolated transformers. The suggested MLI structure has many unique benefits, including the use of fewer switching components and the availability of self-galvanic isolation. The MATLAB simulation results are carried out to evaluate the effectiveness of the suggested TBMLI. In addition, a comparison of the suggested structure to other recent configurations is presented. © 2023 IEEE.Item Design and implementation of novel multilevel inverter with full DC-utilization(Taylor and Francis Ltd., 2025) Nageswar Rao, B.; Yellasiri, Y.; Aditya, K.; Shiva Naik, B.S.; Karunakaran, E.This paper presents a novel single-source transformer-based nine-level (9 L) inverter configuration. The design incorporates a three-level neutral-point-clamped (3 L NPC) inverter, a 3-L full bridge, and a transformer to produce 9 L output voltage levels. In particular, one of the 2 L legs in the full bridge is common among the transformer and the load. The proposed structure minimises the components compared to existing transformer-based nine-level inverters. Thus, the suggested inverter volume, cost, and complexity are minimised. Furthermore, a pulse width modulation method has been developed to generate the necessary gating pulses for the proposed inverter. Additionally, a complete comparison study illustrates the enhanced performance of the suggested architecture. The validity of the suggested 9 L inverter is assessed by performing MATLAB simulations and using a scaled prototype. The results obtained from the simulations and experimental tests are then presented and analysed. A clear correlation was observed between the simulation and the hardware results. © 2024 Informa UK Limited, trading as Taylor & Francis Group.