Faculty Publications

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Author: search.filters.author.Abhilash Krishna, D.G.A.

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    Design and Analysis of Multi-Loop Feed Forward Control Schemes for DVR under Distorted Grid Conditions
    (Institute of Electrical and Electronics Engineers Inc., 2018) Karthikeyan, A.; Abhilash Krishna, D.G.A.; Kumar, S.; Nagamani, C.
    Voltage sags are considered as important power quality problems and the Dynamic Voltage Restorer(DVR) is an effective solution to mitigate the sags and other power quality problems related to voltage. The DVR involves two major aspects: (i) reference generation and (ii) control algorithm. Under unbalanced grid conditions the presence of negative sequence components in the grid voltage causes sustained oscillations in the estimated dq- voltages, which makes sag detection difficult with conventional SRF-PLL and there by chances of controller malfunctioning. In this paper, a Delayed Signal Cancellation (DSC) pre-filter based Positive and Negative Sequence Extractor (PNSE) is employed to extract the Instantaneous Symmetrical Components (ISC) of the grid voltage and filter out the harmonic voltages from the estimated dq-voltages. As the response of the DVR mainly depends on the controller action this paper presents an multiloop PI feed forward controller for enhancing the operation of DVR under distorted grid conditions. The efficacy of the proposed controller is illustrated by comparative study with multiloop feed forward P controller using time response and relative stability analysis. Simulation studies are performed in PSCAD/EMTDC for a 10kV medium voltage DVR under various voltage disturbances such as symmetric and asymmetric voltage sags. © 2017 IEEE.
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    Design and analysis of frequency adaptive CDSC-PLL for Dynamic Voltage Restorer during adverse grid conditions
    (Institute of Electrical and Electronics Engineers Inc., 2020) Abhilash Krishna, D.G.A.; Karthikeyan, A.
    This paper presents frequency feedback loop based Cascaded Delayed Signal Cancellation PLL employed for dynamic voltage restorer (DVR) application to compensate grid voltage disturbances. The primary and key function of PLL is continuous tracking of grid voltage angle in a precise manner and feed it to DVR control. The conventional CDSC-PLL performance during frequency variation is poor which affects the estimation of grid voltage angle and thereby leads to maloperation of DVR control. Thus in this paper FFL is added to the CDSC-PLL to adapt for frequency variations for effective operation of DVR control. The performance analysis of FFL based CDSC-PLL is presented for various disturbances. Finally, FFL based CDSC-PLL is incorporated in the 10 kV, DVR system and the simulation results of the system for different voltage disturbances by using MATLAB/SIMULINK. © 2020 IEEE.
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    Dual Role CDSC-Based Dual Vector Control for Effective Operation of DVR with Harmonic Mitigation
    (Institute of Electrical and Electronics Engineers Inc., 2019) Karthikeyan, A.; Abhilash Krishna, D.G.A.; Kumar, S.; Venkatesa Perumal, B.V.; Mishra, S.
    For the effective operation of a dynamic voltage restorer (DVR), a control strategy plays a significant role. This paper presents an enhanced control strategy for DVR using dual role cascaded delay signal cancellation (CDSC)-based dual vector control (DVC) under unbalanced and distorted grid conditions. Based on the numerical analysis, it is found that the CDSC prefilter is a promising solution when grid voltage is distorted by symmetric, asymmetric harmonics, and unbalanced sag. Mainly, the CDSC prefilter extracts instantaneous symmetrical components of the grid voltage required for voltage sags detection and generation of fundamental component of reference voltage for the DVR. A CDSC-based DVC algorithm with inductor current and capacitor voltage feedback is implemented in a synchronous reference frame, which tracks the fundamental DVR reference voltages. An extractor based on the modified CDSC strategy is designed to extract harmonics from load voltage during distorted grid conditions. These extracted harmonic components (nonfundamental) are added in phase opposition with fundamental component and fed to pulse width modulation block to generate reference voltages. Experimental studies are conducted on scaled down (100 V, 0.5 kVA) laboratory prototype DVR to verify the effectiveness of the proposed control algorithm under unbalanced and distorted grid conditions. © 1982-2012 IEEE.