Journal Articles
Permanent URI for this collectionhttps://idr.nitk.ac.in/handle/123456789/19884
Browse
17 results
Search Results
Item A review on symmetric, asymmetric, hybrid and single DC sources based multilevel inverter topologies(Elsevier Ltd, 2017) Venkataramanaiah, J.; Yellasiri, Y.; Panda, A.K.In recent past, multilevel inverters(MLIs) are treated as sophisticated power conversion systems demanded for high power medium voltage applications. The aim of this article is to review on recent examined multilevel inverter topologies which can be classified into four groups according to the DC voltage supplied to each fundamental unit and/or arrangement of non-identical fundamental units in an one configuration: Symmetric, Asymmetric, Hybrid and Single DC source topologies. In each group, several new versions have been constructed for last few decades. In this study the position (design and functionality) of each and every topology and also every group are reviewed. Further, a special attention is focused on Single DC source MLIs. Finally at the end of the review, merits, limitations and adequate applications are clearly mentioned. Thus, present review provides complete overview among newly developed multilevel inverters. © 2017 Elsevier LtdItem Cascade multilevel inverter using sub multi-cells(Praise Worthy Prize S.r.l, 2016) Pakala, P.; Yellasiri, Y.Multilevel inverters (MLI) are one of the selected areas in the industry for medium and high power application. The real challenge of MLI is to generate more voltage levels utilizing less voltage sources and power semiconductor switches. This paper presents a new topology of cascaded multilevel inverter with sub multi-cells. This new structure is optimized based on number of powers witches, voltage sources. Moreover the topology enhancement of this cascaded multilevel inverter considering various factors such as the number of power semiconductor devices, the voltage levels of output and the switch standing voltage is given. Since the proposed topology is generalized, the traditional cascaded multilevel inverters can be derived from the proposed multilevel inverter and it offers a provision to propose the desired cascaded multilevel inverter. In addition to that, some facts related to the proposed topologies are proved mathematically. It has the capacity to produce increased output voltage levels with less sources voltages and switches. The proposed topology will generate twenty five output voltage levels with twelve numbers of switches. Further, to figure out the value of voltage sources, an algorithm is presented. To check the operation and execution of the proposed structure, MATLAB/Simulink is used for the simulation and to validate these results a hardware prototype is developed and results are presented. © 2016 Praise Worthy Prize S.r.l. - All rights reserved.Item Investigation on stacked cascade multilevel inverter by employing single-phase transformers(Elsevier B.V., 2016) Yellasiri, Y.; Panda, A.K.In the present paper a new version of multilevel inverter is investigated. This new version is based on hybrid association of commutation cells with H-bridge cells. The association allows a significant reduction of the volume of the capacitors. In fact, presented topology allows us to work on higher input voltage levels with the same power switches. This new version is generally called as SCMI (stacked cascade multilevel inverter). The proposed inverter has potential to generate high quality waveforms, reduction in switching frequency, capable to operate at higher voltage levels and finally utilizes minimum number of switching components. The presented version of SCMI is simulated in Matlab-simulink and further, experimental validation is carried out in the laboratory with prototype setup. © 2016 Karabuk UniversityItem Operation and Control of an Improved Hybrid Nine-Level Inverter(Institute of Electrical and Electronics Engineers Inc., 2017) Sandeep, N.; Yaragatti, R.Y.This paper proposes a new nine-level inverter for medium- and high-power applications. The proposed topology comprises of a three-level (3L) active neutral-point-clamped (ANPC) inverter connected in series with a floating capacitor (FC) fed H-bridge. Besides, two additional switches operating at line frequency are appended across the dc link of the 3L ANPC structure. Compared with conventional hybrid cascaded inverters, the primary advantage of this addition is doubling of the resulting root mean square output voltage. This amelioration is achieved while preserving the standard 3L ANPC and H-bridge structures with minimum topological modification. A simple logic-gate-based voltage balancing scheme is developed to regulate the FC voltage. The proposed voltage balancing method is independent of load power factor, inverter modulation index, and can balance the voltage across FC instantaneously. The step-by-step formulation of logical expressions for the generation of gating pulses is deliberated in detail and can be generalized for any n-level inverter. Further, simulation results as well as the experimental measurements obtained from the laboratory prototype are presented to validate the effectiveness and practicability of the proposed configuration. Finally, the notable merits of the proposed inverter over the prior art topologies is established through a comprehensive comparative study. © 1972-2012 IEEE.Item Design and implementation of active neutralpoint-clamped nine-level reduced device count inverter: An application to grid integrated renewable energy sources(Institution of Engineering and Technology journals@theiet.org, 2018) Sandeep, N.; Yaragatti, U.R.Multilevel inverters are one of the preferred choices in medium-voltage and high-power applications in the recent past. Active neutral-point-clamped (ANPC) inverter is the most popular topology, especially in the class of five-level (5L) inverters. In this study, a nine-level topology with improved output waveform quality is proposed based on ameliorating the 5L ANPC inverter with least modifications. The addition of only two switches operating at line frequency to the conventional 5L ANPC inverter while maintaining an identical precursor part count is the proposed modification. A logic form equation-based active voltage balancing scheme that is independent of load current and power factor is developed to regulate the flying capacitor voltage at the reference value. The operating principle, salient features, and the developed control scheme are comprehensively detailed. The operation of the proposed inverter considering a grid integrated case is simulated in MATLAB/ Simulink, and the results corresponding to steady-state and dynamic conditions are presented. The benefits of the proposed topology are elucidated by comparing it with other classic topologies considering various prominent viewpoints. This comparison has illustrated the proposed topology's distinctive characteristics and profound advantages. The performance validation, feasibility, and practicability of the proposed inverter are established through the experimental results obtained from a laboratory-scale prototype. © The Institution of Engineering and Technology 2017.Item Simplified transformer-based multilevel inverter topology and generalisations for renewable energy applications(Institution of Engineering and Technology journals@theiet.org, 2018) Behara, S.; Sandeep, N.; Yaragatti, U.R.Multilevel inverters (MLIs) generating high-quality voltage waveforms are playing a significant role in renewable energy applications. However, the requirement of higher number of power devices, complex pulse-width-modulation (PWM) and voltage unbalancing issues are the impediments associated with their direct usage. Consequently, several attempts to devise MLIs with lesser number of overall components are witnessed. This study focuses on developing a nine-level inverter comprising of a single transformer and reduced component count. An optimisation of the number of transformers and their turn's ratio for a given number of voltage levels resulting in the least number of switches is investigated and deliberated in detail. Besides, an uncomplicated logic gate-based PWM strategy is developed for generating the gating signals of switches using simple Boolean logic relations. A detailed comparison with other recommended MLI topologies is presented to highlight the notable features of the proposed topology. Simulation results obtained using the model developed in MATLAB/Simulink along with the experimental measurements obtained from a downscale prototype is presented to validate the practicability, effectiveness, and viability of the proposed topology. An explicit agreement among the simulation and experimental results is observed. © The Institution of Engineering and Technology 2017.Item Operation and Control of a Nine-Level Modified ANPC Inverter Topology with Reduced Part Count for Grid-Connected Applications(Institute of Electrical and Electronics Engineers Inc., 2018) Sandeep, N.; Yaragatti, U.R.This paper presents a nine-level active-neutral-point-clamped (ANPC) based multilevel inverter (MLI) topology for grid-connected applications requiring only ten switches. The envisaged structure comprises two parts, namely five-level ANPC unit, and a two-level converter leg whose midpoint is used as another ac terminal. An ad hoc switching state redundancy based modulation strategy is used to ensure that the voltage across the flying capacitor is tightly balanced and is implemented using a look-up table further simplifies the control complexity. The performance and effectiveness of the proposed topology with its control scheme are validated through simulations and experimental tests. Comparison with other MLIs is included to highlight the merits of the proposed topology. From the results, it will be shown that the proposed inverter requires the least part count as compared to other topologies with the same performance and output quality. © 1982-2012 IEEE.Item Design and Implementation of Transformer-Based Multilevel Inverter Topology with Reduced Components(Institute of Electrical and Electronics Engineers Inc., 2018) Behara, S.; Sandeep, N.; Yaragatti, U.R.This paper presents a nine-level transformer-based inverter requiring only eight switches. The envisaged structure consists of two standard H-bridges fed from a single dc source. Besides, a single-phase transformer is employed to aid the process of intermediate voltage level generation. An ad-hoc pulsewidth modulation scheme based on boolean logic form equations is developed to derive the gating pulses. An effortless extension of the proposed inverter to a higher number of voltage levels is also achieved by generalizing the switching functions. Furthermore, the superior performance of the proposed topology is demonstrated through a comprehensive cost-based analysis. Finally, the validation of the proposed topology is accomplished through experiments on a down-scale prototype, and the measurement results are included. © 1972-2012 IEEE.Item Development of a New Hybrid Multilevel Inverter Using Modified Carrier SPWM Switching Strategy(Institute of Electrical and Electronics Engineers Inc., 2018) Venkataramanaiah, J.; Yellasiri, Y.; Panda, A.K.This letter presents a single-phase cascaded transformer based multilevel inverter with a modified carrier-based level shift sinusoidal pulse width modulation (LS-SPWM) technique. The developed topology has two bridges with individual low frequency transformers. The bridges can generate quasi-square waveform and pulse width modulated waveform independently and energized the two transformers whose secondary terminals are cascaded to attain 19-level output voltage waveform across the load. The anticipated configuration has the least number of components to reduce the cost and enhance the reliability of the converter for medium power applications with inbuilt isolation. Furthermore, this letter presents the most common LS-SPWM technique with a new carrier to enhance the fundamental magnitude and shifts the dominant harmonics into three times of the traditional strategy for the same modulation indices. The performance of the proposed topology is validated with experimental results. © 1986-2012 IEEE.Item Asymmetric H-Bridge Single-Phase Seven-Level Inverter Topology with Proportional Resonant Controller(Taylor and Francis Ltd, 2019) Salodkar, P.A.; Kulkarni, P.S.; Waghmare, M.A.; Chaturvedi, P.C.; Sandeep, N.This paper presents an asymmetrical H-bridge single-phase seven-level inverter topology with modified gating scheme for reducing the number of high-frequency switches. Due to shortcomings like steady-state error and problems in removing low-order harmonics associated with proportional integral controller, proportional resonant controller is used for grid-connected converter current control. A practical application of proportional resonant current controller is developed using a low-cost dsPIC33EP256MC202 microcontroller to keep the current injected in to the grid. The validity of proposed inverter and control scheme is verified through simulation and implemented for low-voltage laboratory prototype. © 2017, © 2017 IETE.