Journal Articles
Permanent URI for this collectionhttps://idr.nitk.ac.in/handle/123456789/19884
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Item A novel CSI-fed induction motor drive(2006) Beig, A.R.; Ranganathan, V.T.Current source inverter (CSI) fed drives are employed in high power applications. The conventional CSI drives suffer from drawbacks such as harmonic resonance, unstable operation at low speed ranges, and torque pulsation. This paper presents a novel CSI drive which overcomes all these drawbacks and results in sinusoidal motor voltage and current even with CSI switching at fundamental frequency. The proposed CSI drive uses a three-level inverter as an active filter across motor terminals replacing the bulky ac capacitors used in the conventional drive. A sensorless vector controlled CSI drive based on proposed configuration is developed. The simulation and experimental results are presented. Experimental results show that the proposed drive has stable operation even at low speeds. Comparative results show that the proposed CSI drive has improved torque ripple compared to the conventional configuration. © 2006 IEEE.Item Modified SVPWM algorithm for three level VSI with synchronized and symmetrical waveforms(2007) Beig, A.R.; Narayanan, G.; Ranganathan, V.T.The objective of the present work is to improve the output waveform of three level inverters used in high-power applications, where the switching frequency is very low. This is achieved by maintaining the synchronization, half-wave symmetry, quarter-wave symmetry, and three-phase symmetry in the pulsewidth modulation (PWM) waveforms. The principles of achieving synchronization and symmetries in terms of space vectors for three level inverters are presented. A novel synchronized space vector pulsewidth modulation (SVPWM) algorithms is proposed and verified experimentally. The experimental waveforms of the inverter output voltage and motor no load current for different operating conditions of the drive are presented. The performance measure in terms of the weighted total harmonic distortion (THD) of the line voltage is computed for the linear modulation region of the drive for the proposed algorithm and compared with that of synchronized SVPWM and synchronized sine-triangle pulsewidth modulation (SPWM) technique. The comparative results show that consideration of synchronization and symmetry results in improved THD. Another significant feature of the proposed algorithm is that the symmetry and synchronization leads to self-balancing of the direct current (dc) bus capacitor voltages over every one third cycle of the fundamental. © 2007 IEEE.Item Novel algorithm for control of a shunt active power filter based on a three-level voltage source inverter(2010) Rajashekhar, S.; Vittal, K.P.A three-level voltage source inverter is utilized to implement a shunt active power filter. SVPWM technique is used in the control circuit to generate the required gate pulses for the voltage source inverter. Principle of operation and analysis of the control circuit is presented. The proposed control algorithm ensures balance of dc bus voltages. Hence this active power filter is ideally suited for high power drives and transmission systems. The simulation results are presented and analyzed. The THD of load current is reduced to 6.47 % from 28.795 % in steady operation. © 2010 Institute of Thermomechanics AS CR.Item Synchronized symmetrical bus-clamping PWM strategies for three level inverter: Applications to low switching frequencies(2011) Veeranna, S.B.; Yaragatti, U.R.; Beig, A.R.The digital control of three-level voltage source inverter fed high power high performance ac drives has recently become a popular in industrial applications. In order to control such drives, the pulse width modulation algorithm needs to be implemented in the controller. In this paper, synchronized symmetrical bus-clamping pulse width modulation strategies are presented. These strategies have some practical advantages such as reduced average switching frequency, easy digital implementation, reduced switching losses and improved output voltage quality compared to conventional space vector pulse width modulation strategies. The operation of three level inverter in linear region is extended to overmodulation region. The performance is analyzed in terms THD and fundamental output voltage waveforms and is compared with conventional space vector PWM strategies and found that switching losses can be minimized using bus-clamping strategy compared to conventional space vector strategy. The proposed method is implemented using Motorola Power PC 8240 processor and verified on a constant v/f induction motor drive fed from IGBT based inverter. © 2011 Berkeley Electronic Press. All rights reserved.Item Space vector-based synchronised bus-clamping pulse width modulation algorithms for three-level voltage source inverter in overmodulation region(2012) Veeranna, S.B.; Yaragatti, R.Y.; Beig, A.R.The main objective of the present work is to develop space vector-based synchronised bus-clamping pulse width modulation algorithms to improve total harmonic distortion and higher DC-bus utilisation of the three-level inverter in overmodulation region. The proposed algorithms can generate synchronised pulse width modulation waveforms with all possible pulse number preserving all the waveform symmetries. The results of the proposed algorithms are evaluated and compared with conventional space vector pulse width modulation algorithm. It is shown that the proposed algorithms give improved results in terms of total harmonic distortion and DC-bus utilisation than that of conventional one in overmodulation region. The proposed method is implemented and verified experimentally on a constant v/f drive fed from insulated gate bipolar transistor (IGBT)-based voltage source inverter using Motorola power PC-based embedded controller. © 2012 The Institution of Engineering and Technology.Item Improved space vector PWM algorithm for three-level voltage source inverter in overmodulation region(Inderscience Publishers, 2013) Veeranna, S.B.; Yaragatti, U.In high power high performance AC drive industrial applications, multilevel inverters have established their importance, as they can synthesise output waveform with improved harmonic spectrum. In this paper, an improved synchronisation and symmetrical SVPWM algorithm is proposed for three-level inverter in overmodulation region for better utilisation of DC bus and to reduce harmonic distortion. The performance analysis of the proposed algorithm is compared with SHEPWM and STPWM for three-level voltage source inverter in terms of THD of line voltage and motor current along with fundamental component of the line voltage. It is shown that the proposed algorithm gives improved results compared to SHEPWM and STPWM algorithms. The algorithm is also verified experimentally on a constant v/f drive fed from IGBT-based voltage source inverter using Motorola power PC (MPC8240) based embedded controller. © 2013 Inderscience Enterprises Ltd.Item Performance study of distributed generation system in grid connected/isolated modes(2014) Nayak, S.K.; Gaonkar, D.N.The Microturbine Generations (MTG) system is becoming one of the promising sources of Distributed Generation (DG) due to their fuel flexibility, reliability and power quality. Thus, the accurate model of MTG system is required for the grid connected operation and its perturbations. This article presents the performance study of MTG based DG system in grid connected, islanding and re-closed modes of operation. The developed model of MTG system includes a microturbine as prime mover, Permanent Magnet Synchronous Machine (PMSM) and power electronics interacting circuit along with control schemes. The MTG system uses the turbine speed to control the microturbine output power in comparison with the reference speed and shaft speed. The generated AC power is converted to DC using a passive rectifier and this DC power is inverted back to AC power to mach grid frequency. The DC link power is delivered to the grid, islanding load using a three phase voltage source inverter with Pulse Width Modulation (PWM) techniques. While delivering the DC link power to the grid and islanding load, the respective Active, Reactive Power (PQ) and Voltage Frequency (VF) control strategies are used for inverter operation. The detailed model of MTG system along with control schemes is developed using Matlab/ Simulink environment and the simulation results show the performance of MTG based DG system. From the simulation study, it is ascertained that, the developed model of MTG system can delivers the power to grid and isolated load significantly, by shifting the converter controller manually.Item Implementation of Single-Phase Two-Switch Midpoint Unidirectional Multilevel Converter System(Walter de Gruyter GmbH, 2018) Roy, P.R.; Parthiban, P.; Babu, B.This paper deals with implementation of a single-phase three level converter system under low voltage condition. The frequency of the switches is made constant and involves change in $-t-on}}$ton and $-t-off}}$toff duration. For this condition the pulse width modulation control scheme for a single phase three level rectifier is developed to improve the power quality. The hysteresis current control technique is adopted to bring forth three-level PWM on the dc side of the bridge rectifier and to achieve high power factor and low harmonic distortion. Based on the proposed control scheme, the line current is driven to follow the sinusoidal current command which is in phase with the supply voltage. By using three-level voltage pattern the blocking voltage of each power device is clamped to half of the dc link voltage. The simulation and experimental results of 20W converter under low input voltage condition are shown to verify the circuit performance. Open loop simulation and hardware tests are implemented by applying a low voltage of 15 V(rms) on the input side. © 2018 Walter de Gruyter GmbH, Berlin/Boston 2018.Item Simplified transformer-based multilevel inverter topology and generalisations for renewable energy applications(Institution of Engineering and Technology journals@theiet.org, 2018) Behara, S.; Sandeep, N.; Yaragatti, U.R.Multilevel inverters (MLIs) generating high-quality voltage waveforms are playing a significant role in renewable energy applications. However, the requirement of higher number of power devices, complex pulse-width-modulation (PWM) and voltage unbalancing issues are the impediments associated with their direct usage. Consequently, several attempts to devise MLIs with lesser number of overall components are witnessed. This study focuses on developing a nine-level inverter comprising of a single transformer and reduced component count. An optimisation of the number of transformers and their turn's ratio for a given number of voltage levels resulting in the least number of switches is investigated and deliberated in detail. Besides, an uncomplicated logic gate-based PWM strategy is developed for generating the gating signals of switches using simple Boolean logic relations. A detailed comparison with other recommended MLI topologies is presented to highlight the notable features of the proposed topology. Simulation results obtained using the model developed in MATLAB/Simulink along with the experimental measurements obtained from a downscale prototype is presented to validate the practicability, effectiveness, and viability of the proposed topology. An explicit agreement among the simulation and experimental results is observed. © The Institution of Engineering and Technology 2017.Item A Switched-Capacitor-Based Multilevel Inverter Topology with Reduced Components(Institute of Electrical and Electronics Engineers Inc., 2018) Sandeep, N.; Yaragatti, U.R.This letter presents an improved sensorless nine-level inverter topology with reduced number of components. It is formed by cascading a three-level T-Type neutral clamped point inverter with a floating capacitor (FC) fed two-level converter unit. Additionally, two line-frequency switches are appended across the dc-link. A simple logic-form equations-based pulse width modulator is designed which is in-charge of maintaining the FC voltage at its reference value without any aid of voltage and current sensor. Thus, the complexity in control of the proposed topology is very minimal. The working principle of the proposed inverter and formulation of logic-form equations is deliberated in detail. Furthermore, experimental results obtained from the developed prototype are presented to validate feasibility and operability of the proposed topology. Finally, a comprehensive comparison with some of the recently reported inverter topologies proving the merits of the proposed topology is included. © 1986-2012 IEEE.
