Journal Articles
Permanent URI for this collectionhttps://idr.nitk.ac.in/handle/123456789/19884
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Item Investigation on cascade multilevel inverter with symmetric, asymmetric, hybrid and multi-cell configurations(Ain Shams University editor@eng.asu.edu.eg, 2017) Yellasiri, Y.; Venkataramanaiah, J.; Panda, A.K.; Dhanamjayulu, C.; Pakala, P.In recent past, numerous multilevel architectures came into existence. In this background, cascaded multilevel inverter (CMLI) is the promising structure. This type of multilevel inverters synthesizes a medium voltage output based on a series connection of power cells which use standard low-voltage component configurations. This characteristic allows one to achieve high-quality output voltage and current waveforms. However, when the number of levels increases switching components and the count of dc sources are also increased. This issue became a key motivation for the present paper. The present paper is devoted to investigate different types of CMLI which use less number of switching components and dc sources and finally proposed a new version of Multi-cell based CMLI. In order to verify the proposed topology, MATLAB – simulations and hardware verifications are carried out and results are presented. © 2016 Ain Shams UniversityItem Design and implementation of a novel nine-level MT-MLI with a self-voltage-balancing switching technique(Institution of Engineering and Technology kvukmirovic@theiet.org, 2019) Shiva Naik, B.S.; Yellasiri, Y.; Venkataramanaiah, J.; Panda, A.K.In this study, a novel nine-level modified T-type multilevel inverter (MT-MLI) with a simple capacitor balancing technique is proposed. The proposed MT-MLI circuit can generate higher levels with a single DC source and the minimum number of switching components. Each phase of the proposed topology contains ten switches and one flying capacitor (FC). The DC source voltage is divided into two parts with the help of capacitors. Phase disposition-sine pulse-width modulation technique is employed to regulate the DC-link capacitors and FC voltages. To reduce the control complexity of FC-based circuits, quarter-cycle selector is introduced to control the FC voltage within the given half fundamental cycle using redundant states, so an external capacitor charging setup is not required. Furthermore, to highlight the potential merits of the proposed MT-MLI, the comparison is made among state-of-the-art MLIs. Simulation verification of the MT-MLI is done using MATLAB/ Simulink, and then hardware verifications are done using the laboratory prototype setup with Opal-RT controller. Finally, adequate results are presented to validate the proposed MT-MLI. © The Institution of Engineering and Technology 2019Item Design and implementation of constant flux controller for VSI assisted SEIG feeding induction motor pump(Inderscience Publishers, 2022) Angadi, S.; Yaragatti, U.R.; Yellasiri, Y.; Raju, A.B.In small scale, stand-alone, wind-power generation employing self excited induction generator (SEIG), water pumping using an induction motor is a typical application. In this paper, a simple voltage regulation scheme for the constant flux operation of the inverter assisted SEIG feeding three-phase induction motor pump is presented. The behaviour of DC-link voltage, frequency, amplitude modulation index (ma) and the shaft speed for load and speed perturbations are discussed in detail. Also, the overall active and reactive power flow for constant flux operation at the point of common coupling (PCC) is analysed. The proposed work presents a simple and reliable controller for SEIG-based stand-alone system for frequency-dependent loads using only a DC-link voltage sensor. Detailed system simulations are performed using Matlab/Simulink and the results of a laboratory prototype are presented to validate the theoretical analysis and practical operability of the proposed system. © 2022 Inderscience Publishers. All rights reserved.Item A modified T-type multilevel inverter for renewable energy applications(Elsevier Ltd, 2024) Nageswar Rao, B.; Yellasiri, Y.; Shiva Naik, B.S.; Aditya, K.; Panda, A.K.The primary challenge in integrating renewable resources into grids using multilevel inverters (MLI) is the need for many separate DC sources and switching device counts. Transformer-based multilevel inverters (TMIs) have emerged to address this issue, aiming to minimize system components and boost source voltage with a single DC source. This research article introduces a novel TMI topology that utilizes only a single DC source and incorporates ten switches to produce good-quality load voltage with high magnitude. The proposed TMI offers several structural advantages, including self-galvanic isolation, reduced switching devices and uniform voltage levels across all turn ratios. Additionally, the TMI operates a switching method called pulse width modulation, which provides the gating pulses to all the power semiconductor devices in the proposed TMI. An experimental model has been created in a laboratory environment, and simulations are performed using the MATLAB/Simulink platform to assess the effectiveness of the suggested TMI. Furthermore, a comparison between the suggested TMI circuit and other recent TMI designs with similar characteristics is performed. This comparison is carried out to assess and validate the superior features of the proposed TMI over the alternative designs. © 2024 Elsevier B.V.Item Design and implementation of novel multilevel inverter with full DC-utilization(Taylor and Francis Ltd., 2025) Nageswar Rao, B.; Yellasiri, Y.; Aditya, K.; Shiva Naik, B.S.; Karunakaran, E.This paper presents a novel single-source transformer-based nine-level (9 L) inverter configuration. The design incorporates a three-level neutral-point-clamped (3 L NPC) inverter, a 3-L full bridge, and a transformer to produce 9 L output voltage levels. In particular, one of the 2 L legs in the full bridge is common among the transformer and the load. The proposed structure minimises the components compared to existing transformer-based nine-level inverters. Thus, the suggested inverter volume, cost, and complexity are minimised. Furthermore, a pulse width modulation method has been developed to generate the necessary gating pulses for the proposed inverter. Additionally, a complete comparison study illustrates the enhanced performance of the suggested architecture. The validity of the suggested 9 L inverter is assessed by performing MATLAB simulations and using a scaled prototype. The results obtained from the simulations and experimental tests are then presented and analysed. A clear correlation was observed between the simulation and the hardware results. © 2024 Informa UK Limited, trading as Taylor & Francis Group.Item A new method for selecting optimum levels in asymmetric Cascaded H-Bridge-Multilevel Inveter with variable DC sources(John Wiley and Sons Ltd, 2025) Venkataramanaiah, J.; Yadav, G.; Balaji, J.; Yellasiri, Y.In general, cascaded H-bridge multilevel inverters (CHB-MLI) are typically operated with either symmetrical or asymmetrical input DC sources, set at predefined specific ratios such as binary (1:2) or trinary (1:3) in the case of asymmetry, to achieve the desired output voltage waveform. However, if any DC source fails to provide the predefined voltage magnitude, or CHB-MLIs with unspecified DC source ratios are utilized, the output voltage waveform may exhibit unequal magnitudes between consecutive levels, thereby causing a significant increase in total harmonic distortion (THD). Conventionally, to mitigate this effect, the corresponding H-bridge is bypassed through zero voltage switching, which leads to an additional burden on the remaining H-bridges to serve the same load. To reduce the burden on the remaining cells and improve the THD profile of the inverter, this article proposes a novel method for CHB-MLI with varying DC magnitudes. It aims to enhance the quality of the output voltage waveform by strategically selecting optimum voltage levels rather than utilizing all available levels when CHB-MLI has unspecified or variable DC sources. This approach can achieve a more balanced distribution of voltage magnitudes across successive levels by eliminating redundant states. Moreover, the proposed technique can reduce switch losses and enhance the converter's efficiency. The proposed method is validated through MATLAB/Simulink software simulations, followed by experimental verification. © 2024 John Wiley & Sons Ltd.