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Browsing by Author "Shiva Naik, B.S."

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    A Dual Boost Multilevel Inverter Circuit for Renewable Energy Applications
    (Institute of Electrical and Electronics Engineers Inc., 2020) Bharadwaj, L.; Yellasiri, Y.; Shiva Naik, B.S.; Nageswar Rao, B.N.; Aditya, K.; Reddy, D.V.
    To minimise the dependence on fossil-fuels, researchers focused on integrating renewable energy with different power electronic inverters. In that process multilevel inverters (MLIs) have gained more attention due to its impeccable advantages. In this work, a novel topology with boost ability, and reduced number of components is proposed. Capacitors used in the proposed structure possess self-balancing ability and the works competently under any loading condition. It is worthy to mention that the blocking voltage of proposed circuit is with in the limits of source voltage even with the dual boost. Sinusoidal pulse width modulation switching strategy technique is employed to get gating signals. Simulation using MATLAB is carried-out to assess the performance of proposed inverter. Further, the proposed circuit is compared with switched-capacitor (SC) based MLIs in terms of number of switches, and standing voltage to highlight the potential merits. © 2020 IEEE.
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    A Fault Tolerant Nine-level Inverter Topology with Full DC Utilization for Electric Vehicle Application
    (Institute of Electrical and Electronics Engineers Inc., 2022) Aditya, K.; Yellasiri, Y.; Shiva Naik, B.S.; Nageswar Rao, B.N.
    In this study, a fault-tolerant nine-level inverter architecture for an electric vehicle application is presented. Although the importance of two-level inverters [1] is well-known in EV applications, it contains significant unwanted harmonics for generated voltage. As replacing a two-level inverter proliferates the quality of power with a multilevel inverter, it is considered one of the efficient ways. Even though multilevel inverters' essence considerably reduces total harmonic distortion. Eventually, the size of the filter requirement also will minimize. Because of the increased device count and capacitor voltage balance issues, we have a slew of reliability concerns. As a result, a fault-tolerant nine-level inverter built by cascading H-Bridge [2] and modified T-type voltage source inverters [3] and a bidirectional switch are presented. With the tiniest changes in the switching combinations, the provided inverter topology can sustain system faults caused by the failure of the source and/or switching devices. Subsequently, When compared to standard nine-level inverters, it features fewer switching devices. The results are observed and validated with a hardware platform while the suggested system is simulated in a MATLAB/Simulink environment under standard and malfunctioning settings. © 2022 IEEE
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    A Fuzzy Logic Based Switching Methodology for a Cascaded H-Bridge Multi-Level Inverter
    (Institute of Electrical and Electronics Engineers Inc., 2019) Azeem, H.; Yellasiri, Y.; Jammala, V.; Shiva Naik, B.S.; Panda, A.K.
    In this letter, an unusual switching technique is implemented using a fuzzy logic approach. The proposed technique simplifies the conventional method by eliminating the traditional logic-gate design. The fuzzy logic pulse generator acts as a lookup table as well as a pulse generator. On the basis of the modulation index as input, controlled membership functions (MFs) and rules of the fuzzy logic controller open various possibilities of producing pulses directly. The proposed technique is evaluated on the cascaded multi-level inverter with symmetric and asymmetric operations using selective harmonic elimination pulsewidth modulation. MFs are designed on the basis of pre-calculated firing conditions for different modulation index values. Hardware verification is carried out to support the proposed switching technique. © 1986-2012 IEEE.
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    A Hybrid Nine-Level Inverter Topology with Boosting Capability and Reduced Component Count
    (Institute of Electrical and Electronics Engineers Inc., 2021) Shiva Naik, B.S.; Yellasiri, Y.; Venkataramanaiah, J.; Panda, A.K.
    Nowadays, output voltage boosting gain property along with curtailment in the circuit voltage stress, and component count are considered as the essential topological features for the new multilevel inverter (MLI) circuits. Recognizing the above, a hybrid nine-level inverter topology (HNIT) for DC-AC conversion is proposed in this brief. Each phase of the HNIT is designed with only eight semiconductor switches, one diode, and two electrolytic capacitors. Herein, series-parallel and conventional-series techniques are utilized effectively to balance the capacitor voltages. Further, cost and quantitative comparisons are carried among the state-of-art circuits to highlight the supremacy of proposed circuit. Subsequently, the performance of HNIT is verified experimentally with the fundamental switching PWM technique at different load conditions. © 2004-2012 IEEE.
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    A modified T-type multilevel inverter for renewable energy applications
    (Elsevier Ltd, 2024) Nageswar Rao, B.; Yellasiri, Y.; Shiva Naik, B.S.; Aditya, K.; Panda, A.K.
    The primary challenge in integrating renewable resources into grids using multilevel inverters (MLI) is the need for many separate DC sources and switching device counts. Transformer-based multilevel inverters (TMIs) have emerged to address this issue, aiming to minimize system components and boost source voltage with a single DC source. This research article introduces a novel TMI topology that utilizes only a single DC source and incorporates ten switches to produce good-quality load voltage with high magnitude. The proposed TMI offers several structural advantages, including self-galvanic isolation, reduced switching devices and uniform voltage levels across all turn ratios. Additionally, the TMI operates a switching method called pulse width modulation, which provides the gating pulses to all the power semiconductor devices in the proposed TMI. An experimental model has been created in a laboratory environment, and simulations are performed using the MATLAB/Simulink platform to assess the effectiveness of the suggested TMI. Furthermore, a comparison between the suggested TMI circuit and other recent TMI designs with similar characteristics is performed. This comparison is carried out to assess and validate the superior features of the proposed TMI over the alternative designs. © 2024 Elsevier B.V.
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    A novel nine-level boost inverter with a low component count for electric vehicle applications
    (John Wiley and Sons Ltd, 2021) Shiva Naik, B.S.; Yellasiri, Y.; Aditya, K.; Nageswar Rao, B.N.
    In electric vehicles (EVs), considerable battery cells are cascaded in series for motor driving to improve the output voltage. The series combination of battery cells causes challenges like isolation of faulty cells, voltage unbalance, and slow charge equalization. Therefore, state-of-charge (SOC) and voltage equalization circuits are often used in industries to protect the battery cells. A nine-level inverter circuit with a double voltage boost is proposed to reduce the above issues based on the switch-capacitor (SC) principle. Unique features like self-balancing, voltage boosting are attained, which cannot be achieved through traditional inverters. The proposed topology can operate at a wide range of modulation indices ((Formula presented.)) to produce different voltage levels. The absence of a back-end H-bridge in the proposed circuit offers low voltage stress across the semiconductors. The operating principle, capacitor sizing, and modulation approach are presented. Further, experimental tests are conducted at different loading conditions to verify the performance of the proposed circuit. © 2021 John Wiley & Sons Ltd.
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    A novel nine-level inverter with reduced component count using common leg configuration
    (Springer Science and Business Media Deutschland GmbH, 2023) Nageswar Rao, B.; Yellasiri, Y.; Shiva Naik, B.S.; Aditya, K.
    This article proposes a nine-level (9 L) inverter with a common leg configuration employing transformers and a single dc source. The suggested inverter uses eight switches and two transformers to produce 9 L output voltage. The suggested circuit minimizes the switches and transformers compared with existing transformer-based multilevel inverters (TMLI). Therefore, the proposed circuit cost, volume and complexity are also reduced. Additionally, a thorough comparison with the various 9 L inverter circuits is conducted to ensure the benefits of the suggested TMLI. A basic logic gate-based pulse width modulation (PWM) is implemented for the suggested 9 L inverter. Simulation and hardware studies verifying the feasibility and proficiency of the suggested inverter are performed. © 2023, The Author(s), under exclusive licence to Springer-Verlag GmbH Germany, part of Springer Nature.
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    A Novel Quadruple Boost Inverter With New Optimized Fuzzy-Based Switching Scheme
    (Institute of Electrical and Electronics Engineers Inc., 2024) Aditya, K.; Yellasiri, Y.; Shiva Naik, B.S.; Nageswar Rao, B.N.; Panda, A.K.
    This brief proposes a novel quadruple boost nine-level inverter (QB-NLI) and an optimized switching pattern using fuzzy logic controller. The suggested method simplifies the traditional approach by removing the conventional logic gate circuit design. The pulse signal generator and lookup table are both derived using a fuzzy logic pulse generator. Fuzzy logic controller (FLC) and Controlled membership functions (MFs) rules open numerous prospects for generating pulses based on the input as modulation index. The suggested technique is examined on the proposed QB-NLI topology using the selective harmonic elimination PWM method. MFs are created based on averaging Newton Rapson and quantizer firing angles for diverse modulation index (mi) values. The proposed QB-NLI structure comprises ten switches with one dc-voltage source and two capacitors. The proposed structure's circuit description, modes of operation, proper component selection, and a new fuzzy-based switching scheme are presented. Further, a discussion about the comparative analysis of the proposed switching technique with other switching techniques concerning THD and RMS voltages is presented. In addition to the simulation results, experimental tests are conducted under various load conditions on the built-in hardware prototype to evaluate the proposed QB-NLI structure and switching technique. © 2023 IEEE.
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    A Novel Seven level inverter with Common-Leg Configuration by Employing Transformers
    (Institute of Electrical and Electronics Engineers Inc., 2022) Nageswar Rao, B.; Yellasiri, Y.; Shiva Naik, B.S.; Aditya, K.
    This paper proposes a new multilevel inverter with a common leg structure using three transformers and eight power semiconductor devices. The intended configuration contains of one traditional H-bridge and two half bridges supplied from a single dc source. The switching power circuit powered three transformers with series connections, which produced seven levels (3VDC, 2VDC, VDC, 0, -VDC, -2VDC, -3VDC) at the inverter output from the source VDC. Further, this circuit demonstrates the benefit of fewer switches and drivers in comparison to the traditional circuits for the production of the same load voltage levels. Thus, the suggested topology complexity, volume, and cost are reduced. Finally, the effectiveness of the suggested inverter is performed using MATLAB, and the simulation studies are incorporated. © 2022 IEEE.
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    A Novel Switched-Capacitor Boost Multilevel Inverter for PV Applications
    (Institute of Electrical and Electronics Engineers Inc., 2020) Reddy, D.V.; Yellasiri, Y.; Shiva Naik, B.S.; Nageswar Rao, B.N.; Aditya, K.; Bharadwaj, L.
    Nowadays, voltage boosting capability with less part count has become the key feature of recently developed MLI topologies. In this work, a novel topology with boost ability, and reduced number of components is proposed. Capacitors used in the proposed structure possess self-balancing ability and the works competently under any inductive-resistive loading conditions. The blocking voltage of proposed circuit is with in the limits of source voltage even with the dual boost. Sinusoidal pulse width modulation switching strategy technique is employed to get gating signals. Simulation using MATLAB is carried-out and hardware tests are conducted with the available components to assess the performance of proposed inverter. Further, the proposed circuit is compared with switched-capacitor (SC) based MLIs in terms of number of switches, and standing voltage to highlight the potential merits. © 2020 IEEE.
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    A Single Source Self-Balanced Boost MLI with Reduced Part Count for EV Applications
    (MDPI, 2023) Aditya, K.; Yellasiri, Y.; Kumar, R.D.; Shiva Naik, B.S.; Nageswar Rao, B.; Dhanamjayulu, C.
    As the use of inductor-based topologies demands a large amount of space, capacitor-based topologies have garnered attention. Electric Vehicles (EVs) are usually equipped with two-level inverters, which require separate control strategies for each level and synchronizing the strategies increases the complexity of operation and makes them unreliable. Therefore, a single-stage converter with boost and conversion abilities with better power quality at optimal component count and efficiency is needed. A novel capacitor-based boost multilevel inverter (CB-MLI) topology is proposed in this paper as it is found suitable for EV and HEV applications. It is capable of generating an eleven-level waveform with only eleven switches, three capacitors, and a single isolated source. The self-balancing property of the capacitors makes the topology one of a kind. A constant carrier PWM-based control strategy is utilized to switch the IGBTs. Testing results from hardware setup confirm the proposed capacitor-based CB-MLI topology operating modes and potentiality. Lastly, by highlighting the proposed and existing MLI circuits, the benefits of the recommended configuration are outlined by component count and total cost. Additionally, it is a simplified design that needs fewer footprint areas and space. © 2023 by the authors.
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    A Single Stage Switched-Capacitor Hexad Boost Multilevel Inverter Featuring Boost Ability
    (Institute of Electrical and Electronics Engineers Inc., 2020) Shiva Naik, B.S.; Yellasiri, Y.; Venkataramanaiah, J.
    Nowadays, curtailment in the number of dc sources, circuit component count along with the boosting gain property of the output voltage are considered as the essential topological features for the new multilevel inverter (MLI) structures. Considering the above, a novel 13-level single-stage switched-capacitor hexad boost (S3 CHB) inverter featuring boosting gain and self-balancing ability is proposed in this paper. Each phase of the proposed \mathrm{S}^{3} CHB-MLI is designed with only 14 semiconductor switches and three electrolytic capacitors. Here, the capacitors' voltages are balanced automatically by utilizing the series-parallel technique effectively. An absence of H-bridge at the back-end makes the circuit to extend for higher levels. Capacitors' voltage ripple are analyzed in detail. Further, a cost comparison is conducted among the state-of-art MLIs to highlight the superiority of the proposed configuration. Finally, the effectiveness of the proposed \mathrm{S}^{3} CHB circuit is experimentally demonstrated. Results at different load conditions are captured to prove the inductive load capability. © 2020 IEEE.
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    Design and implementation of a novel nine-level MT-MLI with a self-voltage-balancing switching technique
    (Institution of Engineering and Technology kvukmirovic@theiet.org, 2019) Shiva Naik, B.S.; Yellasiri, Y.; Venkataramanaiah, J.; Panda, A.K.
    In this study, a novel nine-level modified T-type multilevel inverter (MT-MLI) with a simple capacitor balancing technique is proposed. The proposed MT-MLI circuit can generate higher levels with a single DC source and the minimum number of switching components. Each phase of the proposed topology contains ten switches and one flying capacitor (FC). The DC source voltage is divided into two parts with the help of capacitors. Phase disposition-sine pulse-width modulation technique is employed to regulate the DC-link capacitors and FC voltages. To reduce the control complexity of FC-based circuits, quarter-cycle selector is introduced to control the FC voltage within the given half fundamental cycle using redundant states, so an external capacitor charging setup is not required. Furthermore, to highlight the potential merits of the proposed MT-MLI, the comparison is made among state-of-the-art MLIs. Simulation verification of the MT-MLI is done using MATLAB/ Simulink, and then hardware verifications are done using the laboratory prototype setup with Opal-RT controller. Finally, adequate results are presented to validate the proposed MT-MLI. © The Institution of Engineering and Technology 2019
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    Design and implementation of a symmetrical multilevel inverter topology
    (Institute of Electrical and Electronics Engineers Inc., 2017) Shiva Naik, B.S.; Venkataramanaiah, J.; Reddy, K.S.; Yellasiri, Y.
    In this project level shifted bipolar sinusoidal Pulse Width Modulation techniques are developed over new symmetrical seven level inverter topology. The proposed SPWM techniques are Phase Disposition Technique, Phase Opposition Disposition Technique and Alternate Phase Opposition Disposition Technique which are under hard switching techniques. More number of components, complex switching patterns and charge balance problems are disadvantages of traditional cascaded MLI [1]. In this new topology, reversing voltage component is used in order to reduce the drawbacks mentioned above. So, it possesses fewer components especially in higher level inverters, reduced losses and stress over the components. Proposed techniques are validated on MATLAB-SIMULINK software. Among all the techniques, Phase Opposition disposition technique produced high RMS output voltage with low total harmonic content. © 2017 IEEE.
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    Design and implementation of novel multilevel inverter with full DC-utilization
    (Taylor and Francis Ltd., 2025) Nageswar Rao, B.; Yellasiri, Y.; Aditya, K.; Shiva Naik, B.S.; Karunakaran, E.
    This paper presents a novel single-source transformer-based nine-level (9 L) inverter configuration. The design incorporates a three-level neutral-point-clamped (3 L NPC) inverter, a 3-L full bridge, and a transformer to produce 9 L output voltage levels. In particular, one of the 2 L legs in the full bridge is common among the transformer and the load. The proposed structure minimises the components compared to existing transformer-based nine-level inverters. Thus, the suggested inverter volume, cost, and complexity are minimised. Furthermore, a pulse width modulation method has been developed to generate the necessary gating pulses for the proposed inverter. Additionally, a complete comparison study illustrates the enhanced performance of the suggested architecture. The validity of the suggested 9 L inverter is assessed by performing MATLAB simulations and using a scaled prototype. The results obtained from the simulations and experimental tests are then presented and analysed. A clear correlation was observed between the simulation and the hardware results. © 2024 Informa UK Limited, trading as Taylor & Francis Group.
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    Design of a New Single-Phase 15-Level Inverter with Minimized Components
    (Institute of Electrical and Electronics Engineers Inc., 2023) Nageswar Rao, B.N.; Yellasiri, Y.; Shiva Naik, B.S.; Aditya, K.; Karunakaran, E.; Kumar, M.V.
    Multilevel inverters (MLI) provide a number of challenges, the most significant of which is the requirement for a high number of power semiconductors and separate dc supplies to assimilate renewable energy into a grid successfully. Because of this, reducing the number of components used in these kinds of inverters is quite important. Because transformer-based multilevel inverters (TBMIs) have become more commonplace, the use of many dc supplies in the cascaded inverter is no longer necessary for the device to function. Based on the outcomes of this study, a new transformer-based MLI with fifteen levels (15L) and eight switches can be built with only one dc source required. The suggested MLI consists of three isolated transformers. The suggested MLI structure has many unique benefits, including the use of fewer switching components and the availability of self-galvanic isolation. The MATLAB simulation results are carried out to evaluate the effectiveness of the suggested TBMLI. In addition, a comparison of the suggested structure to other recent configurations is presented. © 2023 IEEE.
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    Development of cascaded multilevel inverter based active power filter with reduced transformers
    (China Power Supply Society, 2020) Nageswar Rao, B.N.; Yellasiri, Y.; Panda, A.K.; Shiva Naik, B.S.; Jammala, V.
    Active power filter is a power electronic converter used for improving the quality of supply by eliminating the effect of harmonics due to non-linear loads. This paper recommends a concept for shunt active power filter (SAPF) using a single power source fed to a cascaded multilevel inverter (CMI) with 3-? transformers. Apart from traditional transformer based topologies, the required number of transformers are substantially reduced, resulting in less space requirement, which leads to low cost and simple control system. The proposed CMI based SAPF has a capacity to compensate for contaminated load with high harmonic and a low power factor. The effective id ? iq theory is used to calculate compensation currents. DC link voltage regulator analyzed through delay time and controller gain. The tasks of the controller in the SAPF can perform all necessary actions for correct operation in SAPF. A wide range of computer simulation results demonstrated and validated the results with the prototype experimental setup. © 2021 All rights reserved.
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    Novel Nine-level Inverter Topology with Boosting Ability for Electric Vehicle Application
    (Institute of Electrical and Electronics Engineers Inc., 2023) Aditya, K.; Yellasiri, Y.; Shiva Naik, B.S.; Nageswar Rao, B.N.; Karunakaran, E.; Reddy, R.D.
    This paper proposes a new switched-capacitor (SC) based multilevel inverter (MLI) with a boosting gain of four for electric vehicle (EV) applications. The proposed SC-based ninelevel quadruple boost inverter (SC-NLQBI) topology consists of 13 semiconductor switches, three capacitors, and a single input DC supply. It generates nine level voltage waveform, which lessens the requirement for extra filters. Compared to the current nine-level inverter, the new SC-NLQBI topology is simple, compact, and requires fewer parts. Here, a simple triangular carrier signal-based sinusoidal pulse width modulation (SPWM) method is used to generate the required gating pulses. While the proposed topology is being modeled in a MATLAB/Simulation platform using both normal and problematic conditions, the results are analyzed. © 2023 IEEE.
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    Performance Analysis of Novel Multilevel Inverter with Minimum Number of Switching Components
    (Institute of Electrical and Electronics Engineers Inc., 2023) Kumar, T.A.; Yellasiri, Y.; Nageswar Rao, B.N.; Aditya, K.; Shiva Naik, B.S.; Karunakaran, E.
    The immense growth in Multilevel inverters are a great development for industrial and renewable energy applications due to their dominance over conventional two-level inverters concerning size, rating of switches, filter requirement, and efficiency. According to the current topology, the multilevel inverter employing the bidirectional converter is a DC connection that serves as the bidirectional inverter's input power. The bidirectional inverter is configured to output a voltage with several levels by altering the voltage with the bidirectional converter. Also, because there is no need for a low-frequency transformer or an LC filter at the output stage of the multi-level inverter in the present topology, the frequency does not pose any difficulties. In comparison to other traditional topologies, using an asymmetrical multilevel inverter architecture employs fewer switching components to create greater levels. This study proposes a 27-level multilevel inverter with fewer switching components. To validate the technique, the simulation results are shown. © 2023 IEEE.

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