Browsing by Author "Pudi, M."

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    FPGA Implementation of Tri-matrix Multiplication Accelerator using Circulant Matrices for Kalman Filters
    (Institute of Electrical and Electronics Engineers Inc., 2022) Pudi, M.; Srihari, P.; Pardhasaradhi, B.
    The Kalman filter (KF) algorithm's low-power and low-area implementations are essential for both civilian and military applications. In KF, the tri-matrix multiplication (PGP and PGPT) consumes more cycles and transposition buffer hardware. Hence there is a strong need to develop an accelerator module to compute the tri-matrix multiplication without the transposition buffer module and in fewer cycles. This work presents an algorithm for direct or transposed tri-matrix multiplication without timing penalty and extra transposition buffer hardware unit. For an N-dimensional matrix multiplication (PG), the data is stored in circulant matrix form with N BRAMs for ease of write/read, and the resultant is stored in circulant form to enable the chained operation. The complexity of intermediate output (PG) and tri-matrix multiplication (PGP) complexity are O(N2 and O) (2N2) respectively. The KF algorithm with different state vectors is considered, and the tri-matrix multiplications are accelerated on NEXYS 4 DDR Artix-7 FPGA. The critical operating frequency for 2-D constant velocity (CV) and constant acceleration (CA) models operating with 200 MHz and 151 Mz, respectively. In contrast, the 3-D CV and CA models operate with 151 MHz and 115 MHz, respectively. © 2022 IEEE.
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    High-Speed Strassen Matrix Multiplication Accelerators for 2D Kalman Filter
    (Institute of Electrical and Electronics Engineers Inc., 2024) Pudi, M.; Dayananda, B.N.; Achala, G.; Srihari, P.; Pardhasaradhi, B.; Cenkarmaddi, L.R.
    High-speed and low-area Kalman filter (KF) algorithms are critical in autonomous vehicles, robotics, military, target tracking, and other applications. KF requires a large number of matrix multiplications (complexity of order O(n3)), which increases the number of cycles needed to process data. There is a vital requirement to develop a matrix multiplication accelerator module to enhance the efficiency of the entire Kalman Filter (KF) process. This paper proposes two accelerator models for KF, namely pipelined Strassen matrix multiplication and hybrid Strassen matrix multiplication. We propose pipelining the existing Strassen matrix multiplication architecture to reduce critical time to a single multiplication operation. To accelerate the KF and target the low area, we present a hybrid Strassen matrix multiplication architecture that reduces higher dimensions using the Strassen algorithm and computes the 2 × 2 matrix using standard matrix multiplication. The Strassen algorithm, pipelined Strassen algorithm, and hybrid Strassen algorithm-based accelerators are designed for the Vertix-7 FPGA to determine the maximum possible frequency and space limitations. For demonstration purposes, a 2D-KF is studied with a four-dimensional state vector. © 2024 IEEE.