Browsing by Author "Lad Kirankumar, H."

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    Low mismatch high-speed charge pump for high bandwidth phase locked loops
    (Elsevier Ltd, 2021) Lad Kirankumar, H.; Rekha, S.; Laxminidhi, T.
    This paper presents a low mismatch high-speed charge pump for high bandwidth phase locked loop (PLL). A novel mismatch compensation technique is used for reducing the current mismatch without having any extra area and power overhead. Proposed circuit is designed for 100 ?A charge pump current (ICP) and it achieves less than 1% mismatch current across all process corners for an output voltage compliance range of 0.2–1 V. A prototype circuit of 1 GHz PLL is designed in 65 nm CMOS technology for testing the proposed charge pump. It achieves ?81.2 dBc spur-level at reference frequency of 250 MHz. In locked condition of the PLL, proposed charge pump consumes 176 ?W power from 1.2 V supply including the reference current. Area occupied by proposed design is 72 × 35 ?m2. © 2021 Elsevier Ltd