Browsing by Author "Bhat, P.G."

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    Design and FPGA Implementation of Dual Self-Tuning Filter based Controller for Single Phase Shunt Active Filter
    (2019) Bhat, P.G.; Shetty, D.R.; Jayasankar, N.; Vinatha, U.
    The use of power electronic devices injects harmonics into the grid causing serious power quality problems. To limit the current harmonics in accordance with IEEE Std 519, Shunt Active Power Filter (SAPF) may be used. Instantaneous power theory (pq theory) is widely used for current harmonic mitigation in SAPF. The Low Pass Filter (LPF) is used in pq theory based controllers for fundamental component extraction. The drawbacks of LPF are additional phase delay at the fundamental frequency and presence of lower frequency oscillations. A dual Self-Tuning Filter based controller is proposed to overcome these limitations. The simulation studies under different system conditions are carried out using MATLAB/SIMULINK to verify the effectiveness of the proposed method. The hardware cosimulation using ZedBoard Zynq-7000 Development Board is carried out to validate the simulation results. � 2019 IEEE.
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    Design and FPGA Implementation of Dual Self-Tuning Filter based Controller for Single Phase Shunt Active Filter
    (Institute of Electrical and Electronics Engineers Inc., 2019) Bhat, P.G.; Shetty, D.R.; Jayasankar, V.N.; Vinatha Urundady, U.
    The use of power electronic devices injects harmonics into the grid causing serious power quality problems. To limit the current harmonics in accordance with IEEE Std 519, Shunt Active Power Filter (SAPF) may be used. Instantaneous power theory (pq theory) is widely used for current harmonic mitigation in SAPF. The Low Pass Filter (LPF) is used in pq theory based controllers for fundamental component extraction. The drawbacks of LPF are additional phase delay at the fundamental frequency and presence of lower frequency oscillations. A dual Self-Tuning Filter based controller is proposed to overcome these limitations. The simulation studies under different system conditions are carried out using MATLAB/SIMULINK to verify the effectiveness of the proposed method. The hardware cosimulation using ZedBoard Zynq-7000 Development Board is carried out to validate the simulation results. © 2019 IEEE.