Browsing by Author "Arumalla, R.T."

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    A bus-clamping pulse width modulation method for a dodecagonal space vector generation scheme for 3-phase open-end winding induction motor drives
    (Institute of Electrical and Electronics Engineers Inc., 2017) Arumalla, R.T.; Figarado, S.
    Obtaining better harmonic profile at relatively lower switching frequencies is one of the key tasks in the present day power electronics world. Several pulse width modulation (PWM) techniques have been developed earlier in time, to reduce the harmonic content from the output of the inverter. Dodecagonal space vector generation scheme is one of them, which eliminates the most dominant lower order harmonics for the entire modulation range. In this paper, bus-clamping PWM technique is developed for a dodecagonal space vector structure, which is capable of reducing the switching frequency in the linear modulation range compared to conventional dodecagonal space vector technique. In order to compare the performance of the PWM schemes in terms of harmonic content, analytical expressions are derived based on the notion of stator flux ripple in the space vector domain. The results are verified by simulating and comparing the voltage harmonic distortion of the scheme with conventional dodecagonal scheme in terms of voltage weighted total harmonic distortion (VWTHD) and current total harmonic distortion (ITHD). © 2017 IEEE.
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    Analysis and Experimental Investigation of Double Switching Active Vector Sequences in Dodecagonal Space Vector Structure
    (IEEE Computer Society, 2020) Arumalla, R.T.; Figarado, S.; Nagendrappa, N.
    The PWM technique used in the inverter influence the harmonic content of the inverter output and the switching losses in the inverter. The dodecagonal space vector based PWM schemes are amongst the popular harmonic elimination schemes for an open-end winding induction motor drive. These techniques give a better harmonic profile by eliminating the dominant lower-order harmonics (fifth and seventh) from the output voltage of an inverter in the entire modulation range. In this paper, double switching active vector sequence based bus-clamping PWM schemes are developed for dodecagonal SV structure, wherein one of the active vectors in a sector is switched twice in every sub-cycle period. These techniques are named as dodecagonal space vector based advanced bus-clamping PWM (ABC12PWM) techniques. The proposed PWM techniques give a better harmonic profile at higher modulation indices as compared to the dodecagonal conventional space vector PWM (C12SVPWM) and dodecagonal bus-clamping PWM techniques (BC12PWM) techniques. The analysis of total RMS harmonic distortion and switching losses are done for the proposed schemes, and the obtained results are compared with C12SVPWM and BC12PWM techniques. The implementation of proposed PWM schemes is done on a laboratory scale induction motor drive. © 2020 IEEE.
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    A bus-clamping pulse width modulation method for a dodecagonal space vector generation scheme for 3-phase open-end winding induction motor drives
    (2017) Arumalla, R.T.; Figarado, S.
    Obtaining better harmonic profile at relatively lower switching frequencies is one of the key tasks in the present day power electronics world. Several pulse width modulation (PWM) techniques have been developed earlier in time, to reduce the harmonic content from the output of the inverter. Dodecagonal space vector generation scheme is one of them, which eliminates the most dominant lower order harmonics for the entire modulation range. In this paper, bus-clamping PWM technique is developed for a dodecagonal space vector structure, which is capable of reducing the switching frequency in the linear modulation range compared to conventional dodecagonal space vector technique. In order to compare the performance of the PWM schemes in terms of harmonic content, analytical expressions are derived based on the notion of stator flux ripple in the space vector domain. The results are verified by simulating and comparing the voltage harmonic distortion of the scheme with conventional dodecagonal scheme in terms of voltage weighted total harmonic distortion (VWTHD) and current total harmonic distortion (ITHD). � 2017 IEEE.
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    Harmonic and switching loss analysis of two-level space vector based pulse width modulation schemes
    (2017) Krishna, M, R, P.; Arumalla, R.T.; Figarado, S.; Chemmangat, K.
    This paper presents the analysis of harmonic and switching loss for two-level space vector based pulse width modulation (PWM) schemes. The harmonic performance of the inverter is evaluated through weighted voltage total harmonic distortion for different modulation indices. To calculate switching loss, analytical expressions for switching instants are generated by comparing the triangular carrier signal with the equivalent modulating signals corresponding to space vector based modulation schemes and switching instants are obtained in terms of Kapteyn series. The losses are compared analytically for three popular space vector based modulation schemes, namely conventional space vector PWM, 60� bus clamping PWM and 30� bus clamping PWM. � 2017 IEEE.
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    Harmonic and switching loss analysis of two-level space vector based pulse width modulation schemes
    (Institute of Electrical and Electronics Engineers Inc., 2017) Krishna M R, P.; Arumalla, R.T.; Figarado, S.; Chemmangat, K.
    This paper presents the analysis of harmonic and switching loss for two-level space vector based pulse width modulation (PWM) schemes. The harmonic performance of the inverter is evaluated through weighted voltage total harmonic distortion for different modulation indices. To calculate switching loss, analytical expressions for switching instants are generated by comparing the triangular carrier signal with the equivalent modulating signals corresponding to space vector based modulation schemes and switching instants are obtained in terms of Kapteyn series. The losses are compared analytically for three popular space vector based modulation schemes, namely conventional space vector PWM, 60° bus clamping PWM and 30° bus clamping PWM. © 2017 IEEE.
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    Selective Lower Order Harmonic Elimination in DC-AC Converter Using Space Vector Approach
    (Institute of Electrical and Electronics Engineers Inc., 2021) Arumalla, R.T.; Figarado, S.; Panuganti, K.; Nagendrappa, N.
    A novel space vector-based approach is introduced in this brief to selectively eliminate the lower order harmonics from the DC-AC converter output waveform by making use of double switching clamping sequences. This technique uses a volt-second balance for control of fundamental voltage while using the dwell time rearrangement of the active vector in a sub-cycle to obtain the elimination of fifth or seventh harmonics. Further, the closed-form expression of the dwell time-division coefficient (DTDC) for the active vector dwell time division rearrangement is expressed. The proposed PWM technique is compared with other space vector-based PWM techniques in terms of voltage weighted total harmonic distortion, switching power loss, and lower order harmonic magnitudes. Further, the experimental results are presented to show the effectiveness of the proposed PWM techniques in terms of harmonic elimination. © 2004-2012 IEEE.