Browsing by Author "Alamri, B."

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    A Single DC Source Nine-Level Switched-Capacitor Boost Inverter Topology with Reduced Switch Count
    (Institute of Electrical and Electronics Engineers Inc., 2020) Siddique, M.D.; Alamri, B.; Salem, F.A.; Orabi, M.; Mekhilef, S.; Shah, N.M.; Sandeep, N.; Jagabar Sathik, J.S.; Iqbal, A.; Ahmed, M.; Ghoneim, S.S.M.; Al-Harthi, M.M.
    This paper presents a new boost inverter topology with nine level output voltage waveform using a single dc source and two switched capacitors. The capacitor voltages are self-balancing and thus is devoid of any sensors and auxiliary circuitry. The output voltage is twice higher than the input voltage, which eliminates the need for an input dc boost converter especially when the inverter is powered from a renewable source. The merits of the proposed topology in terms of the number of devices and cost are highlighted by comparing the recent and conventional inverter topologies. In addition to this, the total voltage stress of the proposed topology is lower and have a maximum efficiency of 98.25%. The operation and dynamic performance of the proposed topology have been simulated using PLECS software and are validated using an experimental setup considering a different dynamic operation. © 2013 IEEE.
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    A Single DC Source Nine-Level Switched-Capacitor Boost Inverter Topology with Reduced Switch Count
    (2020) Siddique, M.D.; Alamri, B.; Salem, F.A.; Orabi, M.; Mekhilef, S.; Shah, N.M.; Sandeep, N.; Mohamed, Ali, J.S.; Iqbal, A.; Ahmed, M.; Ghoneim, S.S.M.; Al-Harthi, M.M.
    This paper presents a new boost inverter topology with nine level output voltage waveform using a single dc source and two switched capacitors. The capacitor voltages are self-balancing and thus is devoid of any sensors and auxiliary circuitry. The output voltage is twice higher than the input voltage, which eliminates the need for an input dc boost converter especially when the inverter is powered from a renewable source. The merits of the proposed topology in terms of the number of devices and cost are highlighted by comparing the recent and conventional inverter topologies. In addition to this, the total voltage stress of the proposed topology is lower and have a maximum efficiency of 98.25%. The operation and dynamic performance of the proposed topology have been simulated using PLECS software and are validated using an experimental setup considering a different dynamic operation. 2013 IEEE.