Cascade multilevel inverter using sub multi-cells

Abstract

Multilevel inverters (MLI) are one of the selected areas in the industry for medium and high power application. The real challenge of MLI is to generate more voltage levels utilizing less voltage sources and power semiconductor switches. This paper presents a new topology of cascaded multilevel inverter with sub multi-cells. This new structure is optimized based on number of powers witches, voltage sources. Moreover the topology enhancement of this cascaded multilevel inverter considering various factors such as the number of power semiconductor devices, the voltage levels of output and the switch standing voltage is given. Since the proposed topology is generalized, the traditional cascaded multilevel inverters can be derived from the proposed multilevel inverter and it offers a provision to propose the desired cascaded multilevel inverter. In addition to that, some facts related to the proposed topologies are proved mathematically. It has the capacity to produce increased output voltage levels with less sources voltages and switches. The proposed topology will generate twenty five output voltage levels with twelve numbers of switches. Further, to figure out the value of voltage sources, an algorithm is presented. To check the operation and execution of the proposed structure, MATLAB/Simulink is used for the simulation and to validate these results a hardware prototype is developed and results are presented. 2016 Praise Worthy Prize S.r.l. - All rights reserved.